so PS3's RSX ~ Reality Synthesizer GPU has *no* eDRAM ????

[Andy]

Doesn't the whole "embedded" name imply it's on-chip?

No, if you ever open up a PS2, you will notice 2, 2MB eDRAM ICs next to the Graphics Synthesiser GPU, not actually part of the GPU itself! Same would apply to X360

 

[Megadrive1988]

so, even if indeed the main Xbox360 GPU (presumably R500) is only 150M transistors, that is not telling the entire story. the 150M is basicly all graphics processing logic (dunno if they're counting caches or not) , and then then eDRAM is a seperate unit with some circuitry which obviously means more transistors besides the memory transistors. how many transistors for the eDRAM unit in total? (not counting the main R500 GPU).

 

[Megadrive1988]

According to the inquirer RSX is G70 plus 10MB EDRAM: http://www.theinquirer.net/?article=23325

BIG SIGH....

Except that our friend Fudo still doesn't get it.. Xbox 360's R500 is a R600 derivative and will have an unified shader architecture. R520, the new desktop part, is "just" a souped up R4xx GPU with more pipes and shader 3.0 support.... so still seperate vertex and pixel shaders.

R600 is being derived from the Xbox360's R500.

 

[Glonk]

so, even if indeed the main Xbox360 GPU (presumably R500) is only 150M transistors, that is not telling the entire story. the 150M is basicly all graphics processing logic (dunno if they're counting caches or not) , and then then eDRAM is a seperate unit with some circuitry which obviously means more transistors besides the memory transistors. how many transistors for the eDRAM unit in total? (not counting the main R500 GPU).

IIRC, the EDRAM chip is 90M.

 

[MrWibble]

Doesn't the whole "embedded" name imply it's on-chip?

No, if you ever open up a PS2, you will notice 2, 2MB eDRAM ICs next to the Graphics Synthesiser GPU, not actually part of the GPU itself! Same would apply to X360

Eh? Rubbish!

 

[Andy]

Oh, I'm sorry, you've opened up a PS2 before have you? didn't think so!

 

[phat]

Andy, that's RDRAM you've circled. The eDRAM is entirely on the GS' die.

 

[Andy]

Are you sure about that? If so how much ram do those 2 chips equal in total?

-Edit- You're absolutely right, in my rush to find a picture, I completely overlooked the fact that those 2 ram ICs come off the EE and not the GS. My bad, I feel like slapping myself, for overlooking that fact.

 

[mech]

Guys, I did plenty of circuit/chip design at Uni, and what you're saying doesn't sound right. How are they getting so much bandwidth if it's external? Why would it be called "embedded" if it weren't embedded in the GPU?

Embedded RAM refers to RAM stored INSIDE the processor, it takes up a lot of transistor real estate (10 meg = ~84 million transistors), but that's why they limit it. 4MB eDRAM for PS2 was HUGE at the time, and I believe part of what caused yield issues.

I have no idea what that patent or that bit of text you quoted is meant to prove. They're just talking about AA techniques that require fewer memory resources - such as MSAA, which only requires more Z-Buffer space.

 

[mech]

http://news.teamxbox.com/xbox/8126/Xbox-360-Embedded-DRAM-Spec-Confirmed/

The name "embedded DRAM" is used because the memory is embedded directly onto a chip. The advantage of embedded RAM is that it offers a speed and bandwidth far superior to conventional out-of-the-chip memory. Think of it as comparing system memory (your computer RAM) with a microprocessor's cache memory.

http://xbox360.ign.com/articles/608/608592p1.html

In its simplest terms, eDRAM puts memory directly onto the chip die, making for much faster access times. Normally, data would have to be sent across some sort of bus which is a huge bottleneck in conventional setups. By implementing the memory directly onto the die, the memory can be directly accessed without having to wait for instructions and data to transfer.

 

[Acert93]

I do not want to speak for ERP, but I thought he said he *thought* that the eDRAM would be on chip.

Sory ERP if I misunderstood you (I believe you said thought because you did not have anything final yet). If I am totally mistaken please forgive me.

 

[Xmas]

IIRC, the EDRAM chip is 90M.

IMO that's too low. The memory array itself is at least 84M, perhaps some redundancy to improve yields adds even more. And there's quite a bit of logic packed on that chip, too.

Oh I'll agree with that.

All I'm saying is that MS's 256GB/s isn't some made up best case number based on variable compression, it's as real a number as any of them are. With 4xAA alpha blending and Z/Stencil compare/update that is the number you will get, which happens to match nicely the exact requirements of an 8 pipeline part with 32 bit

As long as there are no edge pixels involved, which would result in additional (external) bandwidth required.

The problem with such numbers, however, is that nowhere actually is this amount of data really transmitted. It's always some compressed representation. If you want to compare that figure, you have to compare it to other "effective bandwidth" figures. I mean, even an NV40 can do in excess of 2GPix/s in theoretical benchmarks with the mentioned settings (alpha blending, z test and update, 4xAA).
More than half of R500 with only 1/7 of the bandwidth?

btw, NV40's theoretical peak for that situation, leaving bandwidth out of the picture, is even beyond that of R500 (8 blended pixels per clock at 550MHz, ROPs running at mem clock)



DemoCoder, R500 presumably has the bandwidth (and ROPs) to output 4 quads with Z only, 2 quads with 32bpp color, or 1 quad with 64bpp color, all with 4xAA enabled. Half speed for FP16 rendering looks quite good to me.

 

[talyn99]

<Mistakes>........................................I rest my case. DOn't know my ass from my elbow in some things, but best not to believe folks too fast.
Peace