SegaR&D said:PVR-5
TBDR
24 PIPES
800MHZ
512MB
1 BILLION POLYGONS PER SECOND
300-350 MILLION TRANSISTORS
[/DREAM]
ROFL
It's been said before that effective theoretical fill-rates can be highly misleading and I'm only pointing it out because it's the probable origin of this dumb speculation.
If PowerVR would need such a configuration to compete with current high end sollutions, then it would actually kill the very purpose of using a fundamentally different architecture in the first place. Look back to the Dreamcast specs, it might help.