PowerVR Series 6 now official
- Thread starter roninja
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http://withimagination.imgtec.com/i...-connected-home-took-center-stage-at-ces-2013
While I had read that the LG H13 contains a dual cluster Rogue, I lived under the impression that LG integrated it at relatively modest frequencies. Those claimed >100GFLOPs would suggest anything but a modest frequency, else what exactly am I missing here?
While I had read that the LG H13 contains a dual cluster Rogue, I lived under the impression that LG integrated it at relatively modest frequencies. Those claimed >100GFLOPs would suggest anything but a modest frequency, else what exactly am I missing here?
anexanhume
Veteran
Well, 554 is 12.8 GF per core @ 200 MHz. Go quad core and up to 400 MHz and you're at 102.4 GF.
All I've seen are wild claims that series 6 is 20x as efficient as series 5.
However, smallest 554 implementation is on 32nm and that's a mobile device. In a TV environment I see no problem running the 554 at 400 MHz. So question is how good is Rogue? One "cluster" = 2 554 cores isn't so outlandish, is it?
However, the 100 GF figure is regurgitated from their own pressers:
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No doubt. Albeit if I should compare it to Rogue's marketing GFLOPs I should also count the 9th FLOP of each vector ALU.
8 Vec4+1 = 8 * 9 FLOPs * 0.2 GHz = 14.4 GFLOPs.
It should be a pretty wild marketing trick, however didn't they add somewhere with the same set of functionalities? Baseline Series6 is DX10 and the only Series5 member above DX9L3 is the SGX545.
4 Vec2 ALUs = 4 * 4 FLOPs * 0.64GHz = 10,24 GFLOPs
G6400 = >200GFLOPs at >600MHz (?)
That's a factor of 20x. Just my very own assumption, based on their public claims.
Look above. It isn't too hard to estimate that in order to reach/exceed for a dual cluster G6200 100 GFLOPs and for a quad cluster G6400 200 GFLOPs you'd need =/>600MHz.
What I forgot to think about is fillrate. G6200 should have 4 TMUs; at say 600MHz it would mean a raw fillrate of 2.4 GTexels/s. Definitely not fillrate in excess for a 4k display and a lower frequency would mean quite a bit less fillrate.
By the way I wish I could decypher how the hell they're calculating FLOPs on those. Most likely the result of some creative marketing where they probably also count FLOPs under conditionals from SFUs for instance. As a layman I can't figure out anything else. IMHO a G6200 should have 2*SIMD16 or similar with 2 TMUs per cluster. At the frequencies they're probably calculating those FLOPs if you'd concentrate on those ALU lanes alone the GFLOP rate should be about 15% lower for a dual cluster variant.
See my post on the Renesas thread
IMG add a single cluster G6100 rogue to the family.
http://www.imgtec.com/News/Release/index.asp?NewsID=730
Marketing claim smallest implementation of openGL es3.0.
Much more is revealed in the blog posting.
http://withimagination.imgtec.com/index.php/powervr/powervr-g6100-small-is-powerful
Of note is for the first time we have a frequency/core performance comparison between Series5 and Series6. Graph suggests that G6100@300Mhz, has 50% more "graphics and compute Gflops performance" than SGX544MP2@250Mhz. (I'm seeing around low 20s for the SGX544MP2 V's Low 30s for the rogue).
Blog also infers the G6100 raw fillrate is @ least 4 pixels per clock (i.e. comfortably the same as 544MP2)
Also revealed in the blog and not in the PR, is that the G6100 limits DX support to DX9.3. It was previously though that DX10 might be the minimum for rogue. The G6100 I suggest is therefore the lowest conformance member of the rogue family, and given its launch timeframe most likely not destined for any DX sockets, which helps of course reduce its size.
Can anyone give an interpretation of what the X and Y axis are supposed to mean in the overall core map on that blog. Why is the G6100 rightmost ? Why is the G6200 leftmost, and only ever so slightly higher than the G6100 ? Or is there no logic to the relative placement whatsoever ? Is the Y axis just the timeline of product announcements ?
Assuming a pure scaling based on cluster (I agree, a very simplistic view), you could see how a G6630@600Mhz could reach x20 the performance of 544MP2@250Mhz:-
544MP2@250Mhz -> G6100@300Mhz= x1.5
G6100->G6600 =x6
300Mhz->600Mhz=x2
Total is x18 plus whatever extra performance you get from going from G6600->G6630.
G6600->G6630= x??
Also, and its a bit off-topic, I don't know why they continue to include SGX520 in such diagrams, my understanding is that it was never implemented in production silicon.
http://www.imgtec.com/News/Release/index.asp?NewsID=730
Marketing claim smallest implementation of openGL es3.0.
Much more is revealed in the blog posting.
http://withimagination.imgtec.com/index.php/powervr/powervr-g6100-small-is-powerful
Of note is for the first time we have a frequency/core performance comparison between Series5 and Series6. Graph suggests that G6100@300Mhz, has 50% more "graphics and compute Gflops performance" than SGX544MP2@250Mhz. (I'm seeing around low 20s for the SGX544MP2 V's Low 30s for the rogue).
Blog also infers the G6100 raw fillrate is @ least 4 pixels per clock (i.e. comfortably the same as 544MP2)
Also revealed in the blog and not in the PR, is that the G6100 limits DX support to DX9.3. It was previously though that DX10 might be the minimum for rogue. The G6100 I suggest is therefore the lowest conformance member of the rogue family, and given its launch timeframe most likely not destined for any DX sockets, which helps of course reduce its size.
Can anyone give an interpretation of what the X and Y axis are supposed to mean in the overall core map on that blog. Why is the G6100 rightmost ? Why is the G6200 leftmost, and only ever so slightly higher than the G6100 ? Or is there no logic to the relative placement whatsoever ? Is the Y axis just the timeline of product announcements ?
Assuming a pure scaling based on cluster (I agree, a very simplistic view), you could see how a G6630@600Mhz could reach x20 the performance of 544MP2@250Mhz:-
544MP2@250Mhz -> G6100@300Mhz= x1.5
G6100->G6600 =x6
300Mhz->600Mhz=x2
Total is x18 plus whatever extra performance you get from going from G6600->G6630.
G6600->G6630= x??
Also, and its a bit off-topic, I don't know why they continue to include SGX520 in such diagrams, my understanding is that it was never implemented in production silicon.
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I'm gettting 18 GFLOPs with the 9nth FLOP per ALU lane counted.
2 cores * 4 ALUs * 9 FLOPs/ALU * 0.25 = 18.0
Left and right should stand for release distances. I wouldn't read into much top to bottom distances in terms of performance if that's where you pointing at, since the 540 is placed slightly above a single core 543 and 544 is placed higher than the 543. It's a marketing diagram after all.
No idea about the 520 to be honest; however the G6100 has clearly as a target SFF mobile GPUs like the Adreno305. DX9L3/OGL_ES3.0 and lowest level performance within the family; if its set to arrive in devices in 2014 it might be too late for it.
I'm guessing you are working out the 544MP2, as the G6100 is quoted in the graph @ 300Mhz.
Also, the graph axis is "relative" Gflops performance, so I don't think it is indicating an absolute figure, but assuming its linear, then top of G6100@300 bar looks about x1.5 of 544mp2@250
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I could have sworn I've answered the above, but never mind.
FINALLY new demos: http://www.imgtec.com/demo_room/
FINALLY new demos: http://www.imgtec.com/demo_room/
I don't see anywhere where a question was asked.
anexanhume
Veteran
I updated the wikipedia page. Can someone please check my work?
http://en.wikipedia.org/wiki/PowerVR#Series_6_.28Rogue.29
http://en.wikipedia.org/wiki/PowerVR#Series_6_.28Rogue.29
What does under config core the 2nd digit stand for? TMUs?
anexanhume
Veteran
I have no idea. I simply assumed 1 based on the others.
If I'm not reading wrong into so far newsblurbs regarding Rogue, the G6100 might be another SGX535 exception having more TMUs per cluster than other variants. If the 2nd digit in config core stands for TMUs (I can't see any legend for that one...there's just a (3) pointing nowhere...) is truly for TMUs then it should be 2/2 for the SGX535. For Rogue it doesn't obviously make sense; for a 4 cluster G64x0 I'd expect at least 2 TMUs/cluster, else 8 all together; in G6100's case it might be 1 cluster/4 TMUs.
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I've seen all new demos now (boy is that stuff slow while downloading...) and while technically impressive I'd honestly appreciate quite a bit more artistic work. Classical OGL_ES3.0 was my favourite; I love volumetric lighting.
That page is all over the place for many descriptions of the cores (not just Rogue). Just talking about Rogue, the compute rates are wrong, but because we've never formally described what the hardware can do in public I can't correct it.
I'll see what I can do about that.
I'll see what I can do about that.
anexanhume
Veteran
