Possible reason for PVR Series 4 cancellation?

[Xigen]

My first post here so please don't eat me alive ;-)

If I remember correctly, the Series 4 was to be fabricated at 0.13 micron by TMSC. Could the immaturity of the process (one example being the GeForce FX delay) have been a contributing factor in STMicroelectronics cancelling the chip?? As I remember, the chip was due to have been released in the first half of this year, and at that point in time was the TMSC process not ready for mass production?

Xigen

 

[Ailuros]

I'd think that the FX is way too much of a complex chip to be even comparable to a much less complex chip as K3.

I'd guestimate that ST Micro was determined to abandon the graphics market and not just cancel one chip release.

 

[megadrive0088]

I would think that any PowerVR Series 4 chip would not have been named KYRO anything, as KYRO relates to Series 3. unless they didnt mind confusing things.

Anyway, from what I recall, Series 4 was ment to be a 4 pipeline chip with T&L onboard, a first for PowerVR. Perhaps Series 4 was a DX8 part, perhaps not, but Series 4 should have been out by fall 2001.

Maybe Series 4 will still see the light of day in NAOMI 3?

you know how good NAOMI2 visuals are, with twin Series 2 chips plus the ELAN T&L unit. all that lighting ability as seen in VF4. Can you freaking imagine twin Series 4 chips, each with 4 pipes & T&L - far, beyond XBox graphics there. man.... I hope Series 4 still sees the light of day.



As for future chips, Series 5 and Series 6.... what can we expect?

 

[megadrive0088]

an old, old outline from 2000 on PowerVR roadmap
http://groups.google.com/groups?q=P...UTF-8&selm=393DD83A.C84927C7@blunet.it&rnum=1

Kyro STG4000 (the first board)
It'll be the first board in the Kyro family using the PowerVR technology
(Series 3?!). Full DirectX and OpenGL (ICD) support is given. They (ST
and Imagination Technologies) look forward to delivering superior image
quality, a future proof architecture, the best performance and in
combination with the last the best price/ performance relation.

Kyro STG4000 facts:
- PowerVR third generation
- Display List based
- On Chip Tile accelerator
- On Chip Triangle set up
- Full 32bit accuracy maintained on chip
+ Improves image quality on output screen
+ No performance hit by staying 32bit internally
- Full Hidden Surface Removal (On chip Z Buffer)
+ Z buffer for each tile fits in on chip cache
- Twin Texture and Shading pipeline
- Tile output buffer

Kyro STG4000 architecture:
- 0.25 Micron Process technology
- 32bit Z/ Stencil buffer
- Deffered Texturing
- Environment Mapped Bump Mapping
- DirectX Texture compression
- Full 8 layers Multitexturing support
- Full Scene Anti Aliasing
- Equivalent ~750MPixels/ sec fill rate (complextiy 3) + 2 Pipes at
system clock of 125MHz = 250MPixels/s actual rate
- 8M Polygons/s

Kyro STG4000 PC99A:
- 3D acceleration
+ ~750MPixels/s
+ 8 Million Polygons/s sustained
- Bus Interface
+ AGP 4x + SB
- Memory Interface
+ 16, 32, 64 Mbyte Memory, SDR SDRAM or SGRAM
+ AGP Direct Memory Execution
- 2D Acceleration
+ 128bit 2D acceleration
+ 270MHZ DAC's - Digital Port
+ DFP or TV encoder
+ High Quality Scaling
- Digital Video Processing
+ VMI Input port
+ DVD Decode Acceleration
(Motion Compensation)
+ Advanced Video Windowing
- Software support
+ Windows 2000, 98, 95, NT4
+ DirectX (7)
+ OpenGL ICD
+ Productivity applets
+ Full software team for support (Bristol Based)
- 0.25 Micron Process technology
- 6 Watts dispassion
- 400 pin BGA

Family overview:
STG 4000 (first board)
STG 4005 (technology shrink)
STG 5000 (PowerVR Series 4, includes T&L, 4 Texture Pipelines)
STG 5005 (technology shrink)
STG 4003 (Targets Low Cost Set Top Box Applications)

Kyro STG4000:
check the infos above please
- 12M transistors

Kyro STG4005:
- 0.18 Micron Process technology
- Equivalent ~900MPixels/s fill rate (complexity 3) + 2 Pipes at system
clock of 150MHz = 300MPixels/s actual rate
- 10M Polygons/s
- 12M transistors
- 400pin BGA

Kyro STG5000:
- 0.18 Micron Process technology
- 4 Texture Pipelines
- Transform and Lighting
- Support for DDR SDRAM
- Equivalent ~1.8GPixels/s fill rate (complexity 3) + 4 Pipelines at
system clock of 166MHz = 664MPixels/s actual rate
- 20M - 25M Polygons/s
- 4.5W dissipation

Kyro STG5005:
no information yet

Kyro STG4003:
no information yet

Timescale:
for the PC -
Kyro STG4000: Q2/ 2000
Kyro STG5000: Q4/ 2000

for the PC (motherboard solutions) -
Kyro STG4005: Q3/ 2000
Kyro STG5005: Q4/ 2000 - Q1/ 2001

Digital Consumer
Kyro STG4003: Q4/ 2000

I guess KYRO name would have covered Series 4 afterall.

And it seems that Series 4 would have started at 0.18

 

[megadrive0088]

it'sa crying shame Series 4 didn't make it. I have almost no hope of ever seeing it. much like Pyramid3D and Real3D-100 for the consumer space

 

[Tahir2]

it'sa crying shame Series 4 didn't make it. I have almost no hope of ever seeing it. much like Pyramid3D and Real3D-100 for the consumer space

But we may have better luck with Power VR Series 5.

What do you think Kristof?

A 'no comment' would be good

 

[Ailuros]

Megadrive that roadmap is ancient. STG4000/4500 were already on .18um (if my memory serves me well for the 4000).

It looked later on like that:

STG4000= KYRO
STG4500= KYRO II
STG4800= KYRO II SE
STG5500= KYRO III

According to ST Micro public statements, there was a possibility for a (let's call it) STG5800= KYRO III SE, which would have been just a speed binned K3 probably. The initial clock/memory speeds of K3, must have started at 250/500MHz.

 

[Xigen]

I've dug around on the net, and this site ( http://www.a1-electronics.co.uk/Graphics_Cards/KyroII/Kyro_IIIreview.shtml), this site (http://www.cdfreaks.com/news2.php3?ID=2072) and this site (http://www.theregister.co.uk/content/3/19617.html) all state that the Series 4 would be built on 0.13 micron. Is this information correct, and if so could the use of the 0.13 micron process have lead to its cancellation?

Xigen

 

[Kristof]

Anything that says STG or KYRO is old and obsolete since they are STMicro products and they have left the market.

On other subjects I can not comment on unannounced products... as usually

 

[Luminescent]

Isn't Elan a hardwired T&L engine. So it wouldn't be comparable to the geometry engines on the xbox or othe DX8 chips which could run a variety of programs.

 

[Rodéric]

On other subjects I can not comment on unannounced products... as usually

I bet you enjoy telling that, after all the time you heard it, you evil

 

[Tahir2]

On other subjects I can not comment on unannounced products... as usually

That was worded most interestingly Kristof.

 

[megadrive0088]

I wanted to know, though i'm sure no one will give the answer, how the T&L unit of Series 4 (starting with STG5000) compares to the Elan T&L processor of Naomi2 - the Series 4 T&L is intergated while Elan is its own chip, seperate from the twin Series 2 chips in Naomi2 that Elan provides T&L for.

seperate components are often better than intergrated ones. obviously. whether we're talking about computer components or stereo componests... though not always. Elan is pretty old, like 1999 tech, IIRC. Series 4 is several years newer.

 

[Teasy]

Didn't a IMGTEC rep recently say, in an interview, that the Series 4 T&L unit was brought forward to PowerVR MBX? Well the T&L unit for PowerVR MBX is a DX8.1 level vertex shader AFAIK.

 

[Dave B(TotalVR)]

Bananas

 

[Dave B(TotalVR)]

.....But seriously

I think Series 4 ws canned because STM held IP on some of the silicon design that went into the KYRO so the design could not be used withoutlicensing by any third party such as COUGH Via COUGH

 

[Ailuros]

Didn't a IMGTEC rep recently say, in an interview, that the Series 4 T&L unit was brought forward to PowerVR MBX? Well the T&L unit for PowerVR MBX is a DX8.1 level vertex shader AFAIK.

MBX HR-S can come with an optional VGP, which if I haven't misinterpreted the pdf at ARM's site, has a small amount of dedicated ram to it.

***edit:

Optional VGP TnL 320-480 MFLOPs floating point geometry engine (160K gates, 6K RAM)

However according to the same pdf, the VGP wasn't ready for distribution at the time the document was compiled (if that is any indication for what is ready and what not...)

Do you have a link on the ImgTec rep statement? I have serious doubts that he meant it the way you got it.

 

[Teasy]

Do you have a link on the ImgTec rep statement? I have serious doubts that he meant it the way you got it.

http://www.eetimes.com/semi/news/OEG20021003S0016

"Metcalfe said development of the Series-4 architecture of PowerVR was dropped when STMicroelectronics, a licensee of earlier PowerVR architectures, decided to pull out of the PC graphics chip market (see February 8 story).

At that time some technologies were pulled forward into the MBX cores, such as vertex geometry processing, and Series-5 architecture development was accelerated, he said."

I understand why you'd doubt this, because my info was also that Series 4's T&L unit was DX7. But there it is, unless the interviewer mis-understood the IMGTEC rep, but its unlikely.

 

[jvd]

where would the series 4 peformence be ? Would it be geforce 4 level , geforce 3 ?

 

[demonic]

where would the series 4 peformence be ? Would it be geforce 4 level , geforce 3 ?

Forget those levels, hey look at Trident. They talked big and delivered so little. Now they are laughing stocks.

For PVR to really get back into the game, they will have to do an ATi, which is talk abit, then deliver big time. With all the focus on them, deliver the mainstream parts (which will generate the revenue) and soon PVR will be back in the game.

What I can't understand, is that tile based rendering is a fantastic idea. Why they cannot pair a fast core and fast memory with it, I don't know.

Anyway, here is hoping some big leap comes from no-where, and makes ATi and Nv scramble some defences...