Peter Hofstee from IBM gave a talk at Stanford this last Wednesday about the Cell microprocessor. I don't know about what has or hasn't been announced with respect to cell but I don't think anything major was revealed. The talk was a good overview of the reasons behind the cell design, some of the problems encountered along the way, and of course an overview of the design itself. The questions and answers were very good with some interesting discussions of what future compilers might or might not be able to do.
The talk was part of the EE380 class which is open to the public. They have a video of the talk available for everyone on the website at: http://www.stanford.edu/class/ee380/schedule.html
I would suggest anyone who is interested in an overview of the cell architecture go ahead and watch it. It's a little over an hour long but well worth it. I know very little about the architecture of these chips but was able to understand most of what he went over.
One thing that surprised me was that I thought that when Sony first went looking for a processor IBM suggested a multi-core PowerPC chip and Toshiba put forth a chip made up of SPE's. And that a compromise was later reached using one modified PowerPC core from IBM and eight SPE's designed by Toshiba. But in the talk it sounded like the SPE was from Mr. Hofstee and IBM. Do we know who was involved in what part of the design?
The talk was part of the EE380 class which is open to the public. They have a video of the talk available for everyone on the website at: http://www.stanford.edu/class/ee380/schedule.html
I would suggest anyone who is interested in an overview of the cell architecture go ahead and watch it. It's a little over an hour long but well worth it. I know very little about the architecture of these chips but was able to understand most of what he went over.
One thing that surprised me was that I thought that when Sony first went looking for a processor IBM suggested a multi-core PowerPC chip and Toshiba put forth a chip made up of SPE's. And that a compromise was later reached using one modified PowerPC core from IBM and eight SPE's designed by Toshiba. But in the talk it sounded like the SPE was from Mr. Hofstee and IBM. Do we know who was involved in what part of the design?
