The guys at Anandtech believe that NVIDIA will release two Tegra 5 [Logan] variants, one with 384 CUDA "cores" (ie. 2 Kepler SMX's) and one with 192 CUDA "cores" (ie. 1 Kepler SMX), with a GPU clock operating frequency ~ 540MHz (which happens to be the GPU clock operating frequency of Kayla according to them). If fabricated on a 28nm fabrication process (as Anandtech believes), the SoC die size would have to be relatively large, but the perf/w and perf/mm^2 could still be very good. Kayla is a 2 SMX Kepler part (but likely based on GT 735M and not GT 640M LE, which is something I think Anandtech got wrong in their podcast). Since Logan is supposed to be at least as performant as Kayla (with respect to GFLOPS throughput?), then it would make sense that there would be a 384 CUDA "core" Logan variant, unless there is some unknown piece of the puzzle we are all missing here. What is unclear at this time is how exactly will NVIDIA be able to keep die size and TDP under control with this many CUDA "cores" using a 28nm fabrication process. Is it really out of the question for NVIDIA to release a Tegra 5 [Logan] variant with 192 CUDA "cores" (ie. 1 Kepler SMX) with a GPU clock operating frequency close to 1GHz, considering that Tegra 4 [Wayne] already has a GPU clock operating frequency up to 672MHz, and considering that the Kepler GT 740M mobile GPU already has a GPU clock operating frequency up to 980MHz?
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