Nvidia Pascal Speculation Thread

[Blazkowicz]

Yes it's the power stuff, to illustrate here's how it can look like on a modern motherboard.

Power consumption is very high on the nvidia Pascal board : 300 watts in such a restricted space.
Cooling would possibly be similar to what IBM uses on its multi-chip modules.

 

[Deleted member 13524]

Can someone explain all those parts shown in the above picture.

If the four dice surrounding the Nvidia GPU are the memory modules then what are the eighteen large dice on the PCB?

Those eighteen large dice also have eighteen small dice next to them and what also looks like a capacitor/inductor. Are these power regulators?

The smaller chips in each edge do seem to be RAM.
I think there will be memory within the MCM package and then more memory in the graphics card's PCB.
These graphics cards are expected to come with 4-8GB of vram. I didn't think they'd be putting all that in the MCM.

 

[LordEC911]

The smaller chips in each edge do seem to be RAM.
I think there will be memory within the MCM package and then more memory in the graphics card's PCB.
These graphics cards are expected to come with 4-8GB of vram. I didn't think they'd be putting all that in the MCM.

Those are actually also part of the power delivery system.
The whole point of HBM is to increase bandwidth while also lowering power consumption.
I highly doubt they are going to mix/match HBM and GDDR5.

 

[Alexko]

I wonder why the Pascal board has so many voltage regulation chips.

 

[mczak]

I wonder why the Pascal board has so many voltage regulation chips.

Isn't that just a nice marketing pic, so 100% made up and fake anyway?

 

[Alexko]

Isn't that just a nice marketing pic, so 100% made up and fake anyway?

That thought did cross my mind too. It certainly wouldn't be unusual for NVIDIA.

 

[lanek]

Even if they had allready this "parts" ready, it will not look like on the photo.

It will not be made with a nice black looking pcb and like a finished product, more surely a green one with tons of connectors for test and control..

But this will be really ugly in a public presentation slide

 

[Deleted member 13524]

Those are actually also part of the power delivery system.
The whole point of HBM is to increase bandwidth while also lowering power consumption.
I highly doubt they are going to mix/match HBM and GDDR5.

You're right, they're probably not memory chips.

But I never said they'd be using GDDR5 for "external" memory either. They could add some 4GB of LPDDR3 2133MT/s in a 128bit configuration and save tons of power compared to what they have now.

 

[A1xLLcqAgt0qc2RyMz0y]

You're right, they're probably not memory chips.

But I never said they'd be using GDDR5 for "external" memory either. They could add some 4GB of LPDDR3 2133MT/s in a 128bit configuration and save tons of power compared to what they have now.

I'm with LordEC911 as the whole point of HBM is to increase bandwidth while also lowering power consumption and having any memory external to the HBM is counter to that goal.

 

[Deleted member 13524]

I'm with LordEC911 as the whole point of HBM is to increase bandwidth while also lowering power consumption and having any memory external to the HBM is counter to that goal.

How much memory do you think they'll put in the MCM package?

For 2015 we're looking at 4GB minimum in any >250€ graphics card. Probably a lot more in flagships.

 

[A1xLLcqAgt0qc2RyMz0y]

How much memory do you think they'll put in the MCM package?

For 2015 we're looking at 4GB minimum in any >250€ graphics card. Probably a lot more in flagships.

In 2016 (probably about 2 years from now when Pascal becomes real) memory density should be much higher. And don't forget it is easier to stack RAM using the 2.5D method.

As Ryan says, NVIDIA is using the 2.5D method where the GPU die and the 3D stacked RAM die are mounted to a common substrate

 

[Blazkowicz]

You're right, they're probably not memory chips.

But I never said they'd be using GDDR5 for "external" memory either. They could add some 4GB of LPDDR3 2133MT/s in a 128bit configuration and save tons of power compared to what they have now.

They can access a CPU's 1TB DDR4 memory, so no pressing need for a "small" and slow additional pool on-board?

Those are actually also part of the power delivery system.
The whole point of HBM is to increase bandwidth while also lowering power consumption.
I highly doubt they are going to mix/match HBM and GDDR5.

On the other hand a separate type of memory was to be seen on Einstein/Echelon slides, "NVRAM" which would be any of these that makes it in time : MRAM, phase change RAM, HP's memristor storage, anything I'm missing (but not magnetic core)

 

[Deleted member 13524]

They can access a CPU's 1TB DDR4 memory, so no pressing need for a "small" and slow additional pool on-board?

Through what bus? PCIe?


Is RAM stacking predicted for the next couple of years?

 

[keldor314]

Through what bus? PCIe?


Is RAM stacking predicted for the next couple of years?

They've announced their own NVLink bus. No work on whether anyone besides IBM will actually have it.

http://devblogs.nvidia.com/parallelforall/nvlink-pascal-stacked-memory-feeding-appetite-big-data/

 

[Blazkowicz]

IBM is touting the "OpenPOWER" initiative, which is of course a limited form of openness. Third party vendors will be able to build IBM-based systems and for now we know about a Tyan motherboard (single socket) and a dual socket motherboard (which might be just two indenpendant computers on one board) custom-made for Google.

http://www.enterprisetech.com/2014/04/28/inside-google-tyan-power8-server-boards/
( nice, I found a web page which shows both at once )
Nothing related to NVLink here. But that shows that you should eventually be able to get non-IBM NVLink systems - as long as they use IBM hardware. Yes I know, that may sound utterly stupid in a way .

It is similar to future Xeon Phi, which will go into a future version of Xeon EX sockets. Replace NVLink with Intel's QPI (also next-gen Xeon Phi is a bit different in that it does have stacked memory plus regular DRAM controllers on the chip, and is basically a bunch of CPUs on a chip). It's "open", as I suppose you can get the motherboard from Intel, Supermicro, Tyan etc. or the server from Dell, Lenovo etc.
But you will have a hard time plugging in that Xeon Phi in an AMD, Sparc or IBM system.

 

[Blazkowicz]

Probably nvidia can sell you a card with a NVLink to PCIe bridge - that will be mandatory if that big Pascal is to make it into gaming PCs. (or duh! looks like there's still a PCIe 16x connection anyway)

The way the module is presented, it looks like as if Pascal was for big iron, server, HPC only.
IBM still funds and builds monstrous things on its own for its exclusive use (mainframe CPUs) ; Intel Xeon Phi series is professional, high end, specific markets as well.

So I'm wondering if that Pascal chip is similarly for specific markets and will not be sold to gamers at all ?
Or that's a stupid idea and they sell it with the NVLinks disabled, just like e.g. FX8350 and i7 3930K have disabled/unused/fused off links (they're server dies sold in consumer chips)

A Pascal "Geforce Titan ZZZ" will possibly have NVLinks between the two GPUs and will more easily justify its outrageous price.. Prepare to sell your house, car or draw down your retirement plan if you have any of these in order to buy it, lol.

 

[Blazkowicz]

The smaller chips in each edge do seem to be RAM.
I think there will be memory within the MCM package and then more memory in the graphics card's PCB.
These graphics cards are expected to come with 4-8GB of vram. I didn't think they'd be putting all that in the MCM.

About the MCM, nvidia was boasting about "~3x memory capacity".
If that's a sloppy "not quite 3x" up from the 6GB on a Titan or K20, that gives 16GB on the MCM. If each "memory rectangle" is an eight-story layer cake that sounds about right.

 

[lanek]

Probably nvidia can sell you a card with a NVLink to PCIe bridge - that will be mandatory if that big Pascal is to make it into gaming PCs. (or duh! looks like there's still a PCIe 16x connection anyway)

The way the module is presented, it looks like as if Pascal was for big iron, server, HPC only.
IBM still funds and builds monstrous things on its own for its exclusive use (mainframe CPUs) ; Intel Xeon Phi series is professional, high end, specific markets as well.

So I'm wondering if that Pascal chip is similarly for specific markets and will not be sold to gamers at all ?
Or that's a stupid idea and they sell it with the NVLinks disabled, just like e.g. FX8350 and i7 3930K have disabled/unused/fused off links (they're server dies sold in consumer chips)

A Pascal "Geforce Titan ZZZ" will possibly have NVLinks between the two GPUs and will more easily justify its outrageous price.. Prepare to sell your house, car or draw down your retirement plan if you have any of these in order to buy it, lol.

I completely aggee with you, but finally, it is exactly what have done Nvidia thoses last years with their roadmap, they never tell if it is for gaming product or HPC ones ..

whatever it is AMD or Nvidia, they will need to make a difference between the HPC GPU's and the gamers part, and finish the tradition of a big sku who cover the high end gamers and the pro's ..

Lately AMD have release the W9100, its an 290x core with his 512bit bus.. but the gpu sport an massive 16GB amount of Ram... impossible to feed it without this 512bit memory controller... And this 16GB of storage is just annunce an era where the memory of the gpu, in term of capacity, in HPC and professional computing will certainly goes to 32GB and then 64GB really quickly.

Tomorrow, i expect to see the difference between the HPC and the gamer card really increase.. because they will otherwise need to do hard choice in term of design..

The architecture will stay the same, but i expect to see them on real different sku as the sku's will really be determined by the need and their functions.

 

[constant]

They can't differentiate Gamer and Pro to much because the Professional market alone isn't enough to support the huge RnD costs required.

The pro market is only riding piggy back on the gamers, hence only a handful of extrar features will be removed for the gamer versions. There will also be a difference in power consumption due to binning.

Stacked memory is an absolute requirement for gaming. NVLINK could also be really useful for multi-GPU setups where it'll appear like one large GPU due to the super fast interconnect.

A lot of other features such as DP capacity GPUDirect will likely be disabled in hardware/software to continue to differentiate between the two segements. For example the number of nodes that could connect over NVLINK might also be limited to one node with a multi-GPU setup with the regular Geforce drivers.

All in all nvidia continues to deliver some pretty innovative visions of the not too distant future. Lets hope they can make this happen with a little help from IBM.

 

[lanek]

I really dont think you will see Nvlink ( or IBM one ) on gamers part.

And just for clarifiy, i dont say 2 completely different sku's, but i tend to believe the difference will increase between the Pro and gamers gpu's in future.

You cant pass over some innovations who are indeed needed on professional parts because they dont fit the gamers one.