Yes.
NVIDIA Fermi: Architecture discussion
- Thread starter Rys
- Start date
Yes.
leoneazzurro
Regular
Source?
Jawed
Legend
Yeah, that's why I'm as excited by that as you are
In theory it's even less additional mantissa bits because the dual-lane double precision requires a few extra bits per lane already (54 bits across the two lanes).
Jawed
I asked for official AMD documentation regarding IEEE-compliancy, and my post got deleted rather than answered.
leoneazzurro
Regular
That's not a source, however. Strange behaviour or system malfuncton?
edit:
Strange - a second ago, there was a posting from MfA, which i was answering...
Maybe Jen-Hsun shared some of his hallucinogenics via AC?
Anyway: In your analysis of the die-shot please bear in mind, that the Fermi-Chip shown integrates Display-I/O and such.
Strange - a second ago, there was a posting from MfA, which i was answering...
Maybe Jen-Hsun shared some of his hallucinogenics via AC?
Anyway: In your analysis of the die-shot please bear in mind, that the Fermi-Chip shown integrates Display-I/O and such.
Well, there is no source. That's the point. Until I see any information from AMD directly (not Tech Report) stating otherwise, there is no IEEE-compliancy.
nVidia mentions it straight-up in their official whitepaper on their own site. I expect any other IHV to do the same. If it's not in the official documentation, it doesn't exist.
So Dave Baumann needs to make sure that the documentation gets updated, if I'm wrong, rather than linking to Tech Report.
You probably have to be registered as a developer to access the new Stream documentation.
Each and Every review notes that the whole chip is built with IEEE754-2008 compliance for all floating operations.
no NVIO chip?
Really? Now that's cool - it would have saved Dave Baumann some nanoseconds to just state "yes, it is" rather than pull up a link to TR and also would have avoided unnecessary discussion, wouldn't it?
That's what has been said. Unfortunately, I am not able to provide sound evidence since it's not even mentioned in the whitepaper. So you either believe me, that that's what I've been told or you don't.
That's what has been said. Unfortunately, I am not able to provide sound evidence since it's not even mentioned in the whitepaper. So you either believe me, that that's what I've been told or you don't.
Okay, give me a direct quotation from someone from NVIDIA.
PS. I decided to look around a little more first
This isn't about Stream, it's about what the hardware is capable of. Why would I have to register to find out what the hardware is capable of? I'm simply not going to bother, and I'll just buy a competing product instead, where I know what I'm going to get.
Great marketing!
Wouldn't be the first time that all reviews got the same information wrong.
Since CAL/IL is getting the axe the level of information won't be too interesting anyway ... something like IEEE floating point flags has to be taken on faith until they are exposed with an OpenCL extension :/
Are we suppose to actually believe you even thought about purchasing an ATi card?
Edit- Yes, I have read your posting history which is why I made the above comment...
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The Function test is integrated in the latest Stream SDK if I'm correct.
They explicitly state not to be fully compatible since 2006, while the current slides mention to be fully compatible.
And I'm still skeptical about the NVIO chip. There doesn't seem to be a whole lot of space for it in the die shot.
Yes, I've actually stated that I was thinking about getting one, last week. Just look through my post history.
And if you look through my signature, it wouldn't be the first time I've owned an ATi card either.
Maybe pathetic is being used to refer to Nvidia's sad attempts to hoodwink enthusiasts?
Maybe pathetic is being used to refer to Nvidia's sad attempts to hoodwink enthusiasts?
On which side are you on? Ours or theirs?
