Scooby quoted this info in the NPD thread :
Combined 65 nm parts sounds rather optimistic to me. It'll be a big chip with a complex construction method as the eDRAM will need to be on package too. If the eDRAM is present on die in the 65nm Xenos, that's 337 million transistors in one die. Xenon is 165 million. That's nigh on 500 million transistors, the size of a quad-core Pentium. Yields will be lower and there's no market for seconds, so I expect the price to be relatively high. Is it really economical to combine the processors at this level? Previous combo chips like Sony's have always been a good lot of process advancements from the originals so clearly other manufacturers haven't thought an early combination chip is a good move.
Or is this far more likely bunk reporting via the 21st Century's monster child, Rush-Journalism, and in reality the combined chip design isn't targeted for 65 nm but 45nm where we'd expect it?
At the heart of a Valhalla Xbox 360 is a combined 65nm CPU and 65nm GPU on a unified super chip. This also would only need one cooling system and be much quieter and hopefully more reliable than previous Xbox systems (if they include hardware JTAG testing reporting into the design).
Combined 65 nm parts sounds rather optimistic to me. It'll be a big chip with a complex construction method as the eDRAM will need to be on package too. If the eDRAM is present on die in the 65nm Xenos, that's 337 million transistors in one die. Xenon is 165 million. That's nigh on 500 million transistors, the size of a quad-core Pentium. Yields will be lower and there's no market for seconds, so I expect the price to be relatively high. Is it really economical to combine the processors at this level? Previous combo chips like Sony's have always been a good lot of process advancements from the originals so clearly other manufacturers haven't thought an early combination chip is a good move.
Or is this far more likely bunk reporting via the 21st Century's monster child, Rush-Journalism, and in reality the combined chip design isn't targeted for 65 nm but 45nm where we'd expect it?