MS big screw up: EDRAM

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Bill said:
I guess he means cache?

Well, then RSX would have much less than 10 MB.

I'm not following. PC GPU's dont have EDRAM. They work fine.
No I don't mean cache. PC GPU's indeed not have EDRAM and yes they do work fine; however, PC GPUs have their ROPs imbedded into the main core whereas the Xenos doesn't.

PCs: GPU <> local memory
XB360: Xenos <> EDRAM

The transistor allocation is pretty much the same (and remember that you started this thread on the basis that the EDRAM was a waste of transistors), albeit more in the case of PCs. Get rid of the EDRAM and shove the ROPs back into the Xenos chip, and you'll still need local memory - which means you will still need transistors. Ergo, the EDRAM isn't a waste of transistor as both implementations require local memory and both require transistors for this.
 
Neeyik said:
The transistor allocation is pretty much the same (and remember that you started this thread on the basis that the EDRAM was a waste of transistors), albeit more in the case of PCs. Get rid of the EDRAM and shove the ROPs back into the Xenos chip, and you'll still need local memory - which means you will still need transistors. Ergo, the EDRAM isn't a waste of transistor as both implementations require local memory and both require transistors for this.

Im confuesed, What your saying is :

If 360 did'nt have the EDRAM it would still need transister's spent on local memory

You meen a GPU cache or system main memory???
 
scatteh316 said:
Im confuesed, What your saying is :

If 360 did'nt have the EDRAM it would still need transister's spent on local memory

You meen a GPU cache or system main memory???
No, I mean local memory - the storage area for frame buffers. In the case of PC graphics cards, the local memory ends up (on most implementations) storing everything - frame, depth, intermediate, texture, vertex, index buffers and so on; for the XB360 the EDRAM is the local memory for all frame buffer operations with the system memory uses for texture and vertex buffers. If you got rid of the EDRAM (ie. place all of the ROP circuitry into the Xenos chip), then you'd have the Xenos constantly reading and writing into the system memory for all operations (and I don't think there is a modern console that does this). It's got to have some kind of local memory, regardless as to whether it's going to contain ROPs or not.
 
Neeyik said:
If you got rid of the EDRAM (ie. place all of the ROP circuitry into the Xenos chip), then you'd have the Xenos constantly reading and writing into the system memory for all operations (and I don't think there is a modern console that does this).
Isn't Xbox 1 like that?
 
Yes, you're quite right - hence the "I think" part in my statement!

Edit: I've just realised that this is one of the similarities between the original XBox and the 360: the GPU and Northbridge was a combined chip in the XBox (although I suspect that it's really two separate processors, just on the same die) and the Xenos chip acts as the NB in the 360.
 
Another thing that hasn't been brought yet up is how many of those 100 or so transistors actually belong to the ROPs and how many go to the EDRAM. A DRAM cell is 1 transistor + a capacitor. 10MB of those is 10 million. The number of transistors for the accompanying addressing logic (row/column decoders), sense amps, etc., would unlikely be equal to the amount of transistors that make up the cells themselves. Even if that were the case, that would only be 10+10 million transistors for the EDRAM, leaving the rest of the transistors (80 million) for "logic".
 
Neeyik said:
Yes, you're quite right - hence the "I think" part in my statement!

Edit: I've just realised that this is one of the similarities between the original XBox and the 360: the GPU and Northbridge was a combined chip in the XBox (although I suspect that it's really two separate processors, just on the same die) and the Xenos chip acts as the NB in the 360.
The eDRAM in Xenos alleviates the bandwidth deficiency caused by UMA so you can logically regard Xbox 360 as an upgraded Xbox 1. But in PS2 you always had a framebuffer in eDRAM as VRAM with 48GB/s bandwidth, it's not the same as the Xenos eDRAM in a separate daugher die or AA/Z/Alpha co-processor.
 
Silkworm said:
Another thing that hasn't been brought yet up is how many of those 100 or so transistors actually belong to the ROPs and how many go to the EDRAM. A DRAM cell is 1 transistor + a capacitor. 10MB of those is 10 million. The number of transistors for the accompanying addressing logic (row/column decoders), sense amps, etc., would unlikely be equal to the amount of transistors that make up the cells themselves. Even if that were the case, that would only be 10+10 million transistors for the EDRAM, leaving the rest of the transistors (80 million) for "logic".
10MB is 83,886,080 bits - it's one transistor+capacitor for 1 cell = 1 bit. Therefore, the EDRAM composes of 80 million transistors for the DRAM, leaving 25 million for the ROP circuitry and memory controller.
 
- 48 shaders + 22GB/s memory bandwith + edram(32GB/s)
- 64 shaders + 44GB/s memory bandwith

what is the better if same cost ?
 
Bill said:
I'm not following. PC GPU's dont have EDRAM. They work fine.

The typewriter worked "fine" as did the pen before it, but for some strange reason someone somewhere decided they could be improved upon or some other new design might just do the job better and a few other things at the same time.

If we all too the attitude that "This works fine so let's not try anything else" we'd all still be living in caves clubbing our food to death every day and eating it raw. It's a base human instinct to try and improve on what is already there, it's what has got us to where we are today with computers, fantastic (relative) living conditions, space travel etc and while there have been hiccups and failed "let's give it a go"s along the way it is far, far too early in X360s lifespan to decide whether this new approach from ATi and MS is one of those hiccups or one of the decisions that will change the way graphics chipsets are designed in future.

As Neeyik has already pointed out, a lot of that transistor allocation would have had to have been spent anyway, the fact it is on a seperate daughter die is pretty much irrelevant, in terms of transistor cost at least.
 
Not reading all this thread and I won't enter into discussion either (especially as the OP seemed not to want to discuss anything either), but I'll answer Bill's original point with old analogy...

Bill, which would you want to drive to win a race? A 2000 HP drag car or a 150 HP Lotus Elise? Would you always take more power? In a straight line race the drag car would mash the Lotus, but in any other race the Lotus would eclipse the drag car, because the drag car has zip manoeuverability. Which would win a race around a typical F1 circuit - a 150 HP Lotus Elise or a 300 HP articulated lorry? The Lotus, as though it has less power it's more nimble and has less weight/resistance to overcome.

Power != performance. If you can manage more efficiently to complete a task expending less effort, that's a Good Thing. The eDRAM accomplishes this, solving certain tasks in a way that brute power will struggle at. Anyone who thinks power is everything has a very simplistic and inaccurate view of the world.
 
Why design EDRAM into a console but not a PC graphics card?

One thing to keep in mind about EDRAM (and similar local storage systems) is that if you can keep the vast bulk of your data accesses within a given working set of data that's the size of your on-chip buffer your performance wil be far higher than if you access data in a random pattern. On a closed console (such as Xbox360) applications can be specifically written to constrain the operational set of memory to be smaller than the EDRAM size. (one example of this is "tiling," dividing up the render target into smaller chunks that can fit entirely on the chip)

On a PC this luxury does not exist, there would be no preknown size for the on-chip memory that the application could use to partition the memory set. (For example, a GF4MX level ASIC could have a 2MB EDRAM buffer and a hypothetical X1800XT equivalent could have, say, 16MB) On top of this, the user can alter application parameters, such as AA samples per pixel and screen resolution, that dramatically change memory access patterns.
 
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Of course. All compression methods increase effective bandwidth versus zero compression.
 
scatteh316 said:
Could PS3 use a simular technique to increase the Cell + RSX bandwidth?????

I truly don't understand how this D3D compression is supposed to work...I thought it was CPU overhead that needed to be removed. Overhead that OpenGl doesn't have already. If this is referring to new compression techniques for textures etc then I'd like to hear about them.

If anyone can post where MS stated they could get double the bandwith in the overall in the X360 due to this compression I'd appreciate it. Info on just what is being compressed or how it works would be even better.

(I mean 2x the bandwith using these new compression techniques vs. methods of compression commonly used now)
 
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