*If* nVidia had gone with longer pipelines(G71)?

[overclocked]

Im curious to know what speeds they might have achieved *if* they had gone the path of G70s pipelines ? Heat, leakage etz..
Its ofcourse a guessing game and maybe that same trick wouldnt worked that well on 90nm Low-K but this is the place to ask if anywhere.

 

[Ailuros]

Im curious to know what speeds they might have achieved *if* they had gone the path of G70s pipelines ? Heat, leakage etz..
Its ofcourse a guessing game and maybe that same trick wouldnt worked that well on 90nm Low-K but this is the place to ask if anywhere.

Define either "longer pipelines" or "path of G70".

 

[_xxx_]

Define either "longer pipelines" or "path of G70".

Seconded.

 

[Demirug]

I believe overclocked refer to the remove pipeline stages in the G71 Pipeline compared to the G70.

In this case the answer is “not much moreâ€￾ because this filler stages were needed to compensate latency that come from the longer signal paths to in the G70 compared to G71.

 

[overclocked]

Gentlemen it was what demirug wrote i meant, sorry for the confusion.

Uhmm ok Demi it makes sense cause everything is so much smaller.

 

[Geo]

I believe overclocked refer to the remove pipeline stages in the G71 Pipeline compared to the G70.

In this case the answer is “not much moreâ€￾ because this filler stages were needed to compensate latency that come from the longer signal paths to in the G70 compared to G71.

Ah, and that explains the transistor count differences?

 

[Ailuros]

Ah, and that explains the transistor count differences?

Why not? Compared to the G70 the transistor count has been reduced by 8%. Does that sound that huge after all?

 

[Geo]

Oh, I'm not arguing. I just like to get experts like you and Demirug on the record for these things!

 

[silent_guy]

Trying to get an idea about the number of stages that were removed:
304M-287M = 26M transistors. Let's say there's 20 transistors per FF. That gives: 1.3M FF's. That's a *lot*. Let's assume pixel shaders and vertex shaders have roughly the same size (has anybody a better guess?), that gives, 6 quads plus, say, another 3 pseudo quads for the vertex shaders. For a total of 9 quad shaders. Let's give some transistor reduction to the 16 output stages and memory controller. Say an equivalent of another 2 quads. (Using a very large and not so accurate brush here to paint a picture! ). Total amount of quads: 11.
Number of FF's removed per quad: 118K. Let's say the quad pipeline is 1000 FF's wide. Total amount of pipeline stages removed: 118 per quad.

In engineering estimations it's all about getting a feel for orders of magnitude, so I don't expect this number to be anywhere close to reality. It could be 250, it could be 50... Feel free to suggest more accurate numbers.