Okay, I am trying not going to juggle around the current NV30 events.
I will just say this:
The more complex our chips get, the less headroom is left in the current silicon structure. To think that would be the worst of our problems?
Nope! We also have to deal with optimising the cards themselves and being able to take advantage of them.
Considering that the NV30 has numerous problems associated with it's architecture, we would think it was strictly from bad engineering.
I don't believe that it would be a strictly engineering problem, I believe that some of the problems are because of working with a complex architecture.
This will not get any easier, the more transistors we push in, the more complex the design will get. A more complex design will be much harder to optimise.
So how do we overcome the problem of complex architectures?
I am pretty sure I am only cutting the surface of the amount of problems presented. I am sure heat dissipation will also become more of a problem. I won't be surprised if the NV50/R500 are running at 400MHz.
I will just say this:
The more complex our chips get, the less headroom is left in the current silicon structure. To think that would be the worst of our problems?
Nope! We also have to deal with optimising the cards themselves and being able to take advantage of them.
Considering that the NV30 has numerous problems associated with it's architecture, we would think it was strictly from bad engineering.
I don't believe that it would be a strictly engineering problem, I believe that some of the problems are because of working with a complex architecture.
This will not get any easier, the more transistors we push in, the more complex the design will get. A more complex design will be much harder to optimise.
So how do we overcome the problem of complex architectures?
I am pretty sure I am only cutting the surface of the amount of problems presented. I am sure heat dissipation will also become more of a problem. I won't be surprised if the NV50/R500 are running at 400MHz.