Fusion die-shot - 2009 Analyst Day
- Thread starter AnarchX
- Start date
Actual IGP use system memory over HT, so i think that are built from the ground to not need too much bw, but 6x the alu and that clock can't work in my opinion with half the memory bw from the nb...
Of course will be another clock domain, but with base clock, maybe mac 800Mhz.
Even at that speed it will be a starved unit in my opinion
240SPs and 24 TMUs seem really odd for a 2011 GPU-computing design?
Also the transistor density seem very low, if we consider ~100mm² for the CPU part, coming from Propus@45nm 169mm². The IGP should be the same size.
A 32nm bulk motherboard GPU with GDDR5 sideport, should be a wiser move compared to this.
Have you took into consideration 4x1MB L2 instead of 4x512KB? Better comparison would be Athlon II X2 250 die size.
If you look at the anand's piece on it, the memory controller is the biggest deal with fusion. It doesn't look like it has gddr5 pads on it, but has more ht channels than the norm for this class of cpu's.
A 4850 has 63 GB/s bandwidth, so just from scaling 240/800*63=19 GB/s. At the minimum, it is going to need 10GB/s bandwidth for graphics alone. Top of the line CPU's of today have a 25.6GB/s bandwidth, so say 20GB/s for CPU and 10GB/s for GPU is doable from ddr3
A 4850 has 63 GB/s bandwidth, so just from scaling 240/800*63=19 GB/s. At the minimum, it is going to need 10GB/s bandwidth for graphics alone. Top of the line CPU's of today have a 25.6GB/s bandwidth, so say 20GB/s for CPU and 10GB/s for GPU is doable from ddr3
For graphics you better have >15 (preferably >20)GB/s and such, but I wonder- if the MC is shared, what is doing the bandwidth balancing? Is it always CPU-first?
For most tasks, AMD's 10h CPU cores can do well enough with DDR2-667, so even in games I see quite a lot of space for the GPU to move around.
You have 15-20GB/s, and GDDR5 sideport giving 7-9GB/s more.
HD4650 (GDDR3) - HD4670 ballpark it seems.
For most tasks, AMD's 10h CPU cores can do well enough with DDR2-667, so even in games I see quite a lot of space for the GPU to move around.
You have 15-20GB/s, and GDDR5 sideport giving 7-9GB/s more.
HD4650 (GDDR3) - HD4670 ballpark it seems.
Blazkowicz
Legend
g-ddr5 sideport sound crazy to me. I would prefer triple channel ddr3, three slots on low end motherboards, six slots on higher end.
indeed this CPU will make use of ddr3's bandwith unlike current ones.
indeed this CPU will make use of ddr3's bandwith unlike current ones.
hoom
Veteran
What socket is this on?
Surely they'll be using faster DDR3, a wider bus than normal or both?
What are those 4 links on the left? Look like HT but why have 4 on a single-socket low-end consumer CPU?
Surely gotta be for graphics bandwidth somehow. GDDR5 off the Southbridge? But then, why bother having the GPU on-die?
Hmm, also there is no L3.
Surely they'll be using faster DDR3, a wider bus than normal or both?
What are those 4 links on the left? Look like HT but why have 4 on a single-socket low-end consumer CPU? Surely gotta be for graphics bandwidth somehow. GDDR5 off the Southbridge? But then, why bother having the GPU on-die?
Hmm, also there is no L3.
What socket is this on?
maybe PCIe for external gpu
The rows seen in the left are the HyperTransport interfaces. A whole four of them.
With the lack of L3 cache, this "hybrid" is by far not suitable for MP configurations, so the bunch of HTT connectivity is still a mystery.
By the way, the other thing here is how the IGP part is communicating with the host -- probably a direct link to the crossbar switch in the NB? If this is the case, it's sad there is no attached L3.
With the lack of L3 cache, this "hybrid" is by far not suitable for MP configurations, so the bunch of HTT connectivity is still a mystery.
By the way, the other thing here is how the IGP part is communicating with the host -- probably a direct link to the crossbar switch in the NB? If this is the case, it's sad there is no attached L3.
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HT taking the place of sideport?
To dedicated VRAM on the motherboard, I presume.
Who says all 3 have to be for access to VRAM? AMD chips already use HT for system communication.