Ken Ktuaragi from his recent interview...
For example, RSX is not a variant of nVIDIA's PC chip. CELL and RSX have close relationship and both can access the main memory and the VRAM transparently. CELL can access the VRAM just like the main memory, and RSX can use the main memory as a frame buffer. They are just separated for the main usage, and do not really have distinction.
This architecture was designed to kill wasteful data copy and calculation between CELL and RSX. RSX can directly refer to a result simulated by CELL and CELL can directly refer to a shape of a thing RSX added shading to (note: CELL and RSX have independent bidirectional bandwidths so there is no contention).
Cell can access RAM transparently. Is that through RSX then, or has it got it's own lines to the DDR? What's said implies that Cell can access DDR without interfering with RSX's bandwidth on the matter. Or is it really a case of data being passed from RSX to Cell on request?
