Direct3D feature levels discussion

DmitryKo said:
Andreas,
did you try to query the experimental developer mode on the Nvidia Titan V?
Click to expand...

Here we go, but Ryan already did the same:

Windows 10 version 1709 (build 16299)
Checking for experimental shader models

ADAPTER 0
"NVIDIA TITAN V"
VEN_10DE, DEV_1D81, SUBSYS_121810DE, REV_A1
Dedicated video memory : 12120.0 MB (12708741120 bytes)
Total video memory : 28441.4 MB (29822961664 bytes)
Video driver version : 23.21.13.8859
Maximum feature level : D3D_FEATURE_LEVEL_12_1 (0xc100)
DoublePrecisionFloatShaderOps : 1
OutputMergerLogicOp : 1
MinPrecisionSupport : D3D12_SHADER_MIN_PRECISION_SUPPORT_NONE (0) (0b0000'0000)
TiledResourcesTier : D3D12_TILED_RESOURCES_TIER_3 (3)
ResourceBindingTier : D3D12_RESOURCE_BINDING_TIER_3 (3)
PSSpecifiedStencilRefSupported : 0
TypedUAVLoadAdditionalFormats : 1
ROVsSupported : 1
ConservativeRasterizationTier : D3D12_CONSERVATIVE_RASTERIZATION_TIER_3 (3)
StandardSwizzle64KBSupported : 0
CrossNodeSharingTier : D3D12_CROSS_NODE_SHARING_TIER_NOT_SUPPORTED (0)
CrossAdapterRowMajorTextureSupported : 0
VPAndRTArrayIndexFromAnyShaderFeedingRasterizerSupportedWithoutGSEmulation : 1
ResourceHeapTier : D3D12_RESOURCE_HEAP_TIER_1 (1)
MaxGPUVirtualAddressBitsPerResource : 40
MaxGPUVirtualAddressBitsPerProcess : 40
Adapter Node 0: TileBasedRenderer: 0, UMA: 0, CacheCoherentUMA: 0, IsolatedMMU: 1
HighestShaderModel : D3D12_SHADER_MODEL_6_1 (0x0061)
WaveOps : 1
WaveLaneCountMin : 32
WaveLaneCountMax : 32
TotalLaneCount : 163840
ExpandedComputeResourceStates : 1
Int64ShaderOps : 1
RootSignature.HighestVersion : D3D_ROOT_SIGNATURE_VERSION_1_1 (2)
DepthBoundsTestSupported : 1
ProgrammableSamplePositionsTier : D3D12_PROGRAMMABLE_SAMPLE_POSITIONS_TIER_2 (2)
ShaderCache.SupportFlags : D3D12_SHADER_CACHE_SUPPORT_SINGLE_PSO | LIBRARY (3) (0b0000'0011)
CopyQueueTimestampQueriesSupported : 1
CastingFullyTypedFormatSupported : 1
WriteBufferImmediateSupportFlags : D3D12_COMMAND_LIST_SUPPORT_FLAG_DIRECT | BUNDLE | COMPUTE | COPY (15) (0b0000'1111)
ViewInstancingTier : D3D12_VIEW_INSTANCING_TIER_1 (1)
BarycentricsSupported : 0
ExistingHeaps.Supported : 1
Click to expand...
 
Can anybody explain what D3D12_VIEW_INSTANCING_TIER_1 is and why it is 1 in dev mode and 0 in normal mode? :D

@donjulio: Welcome to the underground of the 'nerd graphics elite'. :)
 
huebie said:
Can anybody explain what D3D12_VIEW_INSTANCING_TIER_1 is
Click to expand...

You have to read the developer documentaiton for now.

https://github.com/Microsoft/DirectXShaderCompiler/wiki/Shader-Model-6.1
https://github.com/Microsoft/DirectXShaderCompiler/wiki/SV_ViewID

https://msdn.microsoft.com/en-us/library/windows/desktop/mt844813(v=vs.85).aspx
https://msdn.microsoft.com/en-us/library/windows/desktop/mt844812(v=vs.85).aspx
https://msdn.microsoft.com/en-us/library/windows/desktop/mt844811(v=vs.85).aspx
https://msdn.microsoft.com/en-us/library/windows/desktop/mt844816(v=vs.85).aspx

and why it is 1 in dev mode and 0 in normal mode?
Click to expand...

Shader Model 6 is based on the new LLVM shader compiler framework and SPIR-V bytecode, and new features are introduced gradually with new OS/Driver builds. SM6 has been released to 'normal' mode starting with Windows 1709, but SM6_1 and view instancing etc. are only available when the developer explicitly enables experimental features on the Direct3D12 device with a call to D3D12EnableExperimentalFeatures(), in addition to enabling the developer mode in Windows settings.

https://github.com/Microsoft/DirectXShaderCompiler/
https://msdn.microsoft.com/en-us/library/windows/desktop/mt492553(v=vs.85).aspx
 
Last edited:
https://github.com/Microsoft/DirectXShaderCompiler/wiki/SV_ViewID
This feature enables instancing of the graphics pipeline by "view", in a manner that is orthogonal to draw instancing...
applications can write one codepath for driving multiple views that can target the breadth of hardware.
... a single draw call can send geometry to multiple output surface locations with different projections, such as left and right eye for stereo rendering.
Click to expand...

In D3D12, most resources are organized into descriptor heaps (termed 'views' as in D3D11) - this includes Shader Resource View (SRV), Constant Buffer Views (CBV), Unordered Access View (UAV), and Samplers; descriptors for graphics pipeline states like Render Target View (RTV) , Depth Stencil View (DSV), Vertex Buffers, Index Buffers, Stream Output Buffers are directly bound to command lists.

RT view instancing allows you to re-use ('instance') these resources to draw into several (currently up to 4) render targets in the same draw call, instead of having to make several draw calls.

This is similar to, but fully independent of, D3D12 draw call instancing where existing graphics command list for an onject is instanced - i.e., is used multiple times to draw several copies of the same object with a single draw call.

It would for example allow you to perform stereoscopic (left-right eye) rendering using the same regular code path - something that I have been anticipating for the last 10 or so years.

On current Tier1/Tier2 hardware, view instancing is only possible with draw call looping, which would process every view and all submitted resources.

On view instancing Tier 3 hardware, the scheduler will be able to eliminate redundant processing for non-instanced resources across the entire pipeline.

[Edit] clarifications
 
Last edited:
So a loop of two view ports (where does it loop?) for VR would take twice the time of one (2D screen), but less time compared to "old methods" (e.g. sending the same draw call again). For my understanding it primarily lowers CPU-Usage; am i right?
 
AFAIK the draw-call loop is implemented by the driver/runtime when shaders or draw commands contain a reference to a view instance.

I'd guess view instancing gives you control over which vertexes/effects are sent to each render target - so for VR stereo you can skip distant/background objects, skybox, HUD, user interface etc. and render them in mono, while with current brute-force approach you can only render the entire scene twice again.
 
Last edited:
Thanks for the explanation. So it is a common usecase in various game-titles where devs can gain performance improvements too. Tier 1 sounds morelike a software feature rather a hardware feature.
 
I've made a small update to my console tool to report new features in Windows 10 RS4 Insider Preview (build 17083) - D3D12_FEATURE_D3D12_OPTIONS4, D3D12_FEATURE_SERIALIZATION, D3D12_FEATURE_CROSS_NODE, and Shader Model 6_2, as well as new tiers for Tiled Resources (Tier 4) and Cross Node Adapter Sharing (Tier 3).

Here's how the new options are reported in WARP12 (Microsoft Basic Render Driver):
Code: 
Adapter Node 0:     TileBasedRenderer: 0, UMA: 1, CacheCoherentUMA: 1, IsolatedMMU: 0, HeapSerializationTier: 10
ReservedBufferPlacementSupported : 1
SharedResourceCompatibilityTier :  D3D12_SHARED_RESOURCE_COMPATIBILITY_TIER_1 (1)
Native16BitShaderOpsSupported : 0
AtomicShaderInstructions : 0

The tool will also report processor architecture of the Windows OS (ARM, ARM64, x86, x64).

BTW there are also a few peculiar processor architectures defined in the SDK, such as IA32_ON_WIN64 (IA32EL?), ARM32_ON_WIN64 (Windows Mobile Emulator?), IA32_ON_ARM64 (CHPE x86 emulator?), but they are not documented.
 
Last edited:
I'd guess all updates to tiled resources (i.e. virtual memory) functionality require additional TLBs/caches/registers, so Tier 4 support on current hardware is not likely.


I'm rather interested in the new Cross-Node Adapter Sharing tier - does it correlate with features of multi-die MCM-GPUs, rumored to be employed in next-gen high-end video cards?
https://wccftech.com/nvidia-future-gpu-mcm-package/
http://research.nvidia.com/publication/2017-06_MCM-GPU:-Multi-Chip-Module-GPUs
https://wccftech.com/amd-navi-gpu-launching-siggraph-2018-monolithic-mcm-die-yields-explored/
 
Last edited:
GF390.77 updated ViewInstancingTier from 1 to 2 (same for Volta)

Direct3D 12 feature checker (January 2018) by DmitryKo (x64)
https://forum.beyond3d.com/posts/1840641/

Windows 10 version 1709 (build 16299.64) x64
Checking for experimental shader models

ADAPTER 0
"NVIDIA GeForce GTX 1050"
VEN_10DE, DEV_1C81, SUBSYS_85C71043, REV_A1
Dedicated video memory : 1977.2 MB (2073288704 bytes)
Total video memory : 18311.9 MB (19201423360 bytes)
Video driver version : 23.21.13.9077
Maximum feature level : D3D_FEATURE_LEVEL_12_1 (0xc100)
DoublePrecisionFloatShaderOps : 1
OutputMergerLogicOp : 1
MinPrecisionSupport : D3D12_SHADER_MIN_PRECISION_SUPPORT_NONE (0) (0b0000'0000)
TiledResourcesTier : D3D12_TILED_RESOURCES_TIER_3 (3)
ResourceBindingTier : D3D12_RESOURCE_BINDING_TIER_3 (3)
PSSpecifiedStencilRefSupported : 0
TypedUAVLoadAdditionalFormats : 1
ROVsSupported : 1
ConservativeRasterizationTier : D3D12_CONSERVATIVE_RASTERIZATION_TIER_2 (2)
StandardSwizzle64KBSupported : 0
CrossNodeSharingTier : D3D12_CROSS_NODE_SHARING_TIER_NOT_SUPPORTED (0)
CrossAdapterRowMajorTextureSupported : 0
VPAndRTArrayIndexFromAnyShaderFeedingRasterizerSupportedWithoutGSEmulation : 1
ResourceHeapTier : D3D12_RESOURCE_HEAP_TIER_1 (1)
MaxGPUVirtualAddressBitsPerResource : 40
MaxGPUVirtualAddressBitsPerProcess : 40
Adapter Node 0: TileBasedRenderer: 0, UMA: 0, CacheCoherentUMA: 0, IsolatedMMU: 1
HighestShaderModel : D3D12_SHADER_MODEL_6_1 (0x0061)
WaveOps : 1
WaveLaneCountMin : 32
WaveLaneCountMax : 32
TotalLaneCount : 10240
ExpandedComputeResourceStates : 1
Int64ShaderOps : 1
RootSignature.HighestVersion : D3D_ROOT_SIGNATURE_VERSION_1_1 (2)
DepthBoundsTestSupported : 1
ProgrammableSamplePositionsTier : D3D12_PROGRAMMABLE_SAMPLE_POSITIONS_TIER_2 (2)
ShaderCache.SupportFlags : D3D12_SHADER_CACHE_SUPPORT_SINGLE_PSO | LIBRARY (3) (0b0000'0011)
CopyQueueTimestampQueriesSupported : 1
CastingFullyTypedFormatSupported : 1
WriteBufferImmediateSupportFlags : D3D12_COMMAND_LIST_SUPPORT_FLAG_DIRECT | BUNDLE | COMPUTE | COPY (15) (0b0000'1111)
ViewInstancingTier : D3D12_VIEW_INSTANCING_TIER_2 (2)
BarycentricsSupported : 0
ExistingHeaps.Supported : 1
Click to expand...

RSAE 18.2.2 did not much:
Direct3D 12 feature checker (January 2018) by DmitryKo (x64)
https://forum.beyond3d.com/posts/1840641/

Windows 10 version 1709 (build 16299.64) x64
Checking for experimental shader models

ADAPTER 0
"Radeon RX 560 Series"
VEN_1002, DEV_67FF, SUBSYS_2381148C, REV_CF
Dedicated video memory : 4041.5 MB (4237844480 bytes)
Total video memory : 20376.2 MB (21365979136 bytes)
Video driver version : 23.20.15017.4003
Maximum feature level : D3D_FEATURE_LEVEL_12_0 (0xc000)
DoublePrecisionFloatShaderOps : 1
OutputMergerLogicOp : 1
MinPrecisionSupport : D3D12_SHADER_MIN_PRECISION_SUPPORT_NONE (0) (0b0000'0000)
TiledResourcesTier : D3D12_TILED_RESOURCES_TIER_2 (2)
ResourceBindingTier : D3D12_RESOURCE_BINDING_TIER_3 (3)
PSSpecifiedStencilRefSupported : 1
TypedUAVLoadAdditionalFormats : 1
ROVsSupported : 0
ConservativeRasterizationTier : D3D12_CONSERVATIVE_RASTERIZATION_TIER_NOT_SUPPORTED (0)
StandardSwizzle64KBSupported : 0
CrossNodeSharingTier : D3D12_CROSS_NODE_SHARING_TIER_NOT_SUPPORTED (0)
CrossAdapterRowMajorTextureSupported : 0
VPAndRTArrayIndexFromAnyShaderFeedingRasterizerSupportedWithoutGSEmulation : 1
ResourceHeapTier : D3D12_RESOURCE_HEAP_TIER_2 (2)
MaxGPUVirtualAddressBitsPerResource : 40
MaxGPUVirtualAddressBitsPerProcess : 40
Adapter Node 0: TileBasedRenderer: 0, UMA: 0, CacheCoherentUMA: 0, IsolatedMMU: 1
HighestShaderModel : D3D12_SHADER_MODEL_6_1 (0x0061)
WaveOps : 1
WaveLaneCountMin : 64
WaveLaneCountMax : 64
TotalLaneCount : 1024
ExpandedComputeResourceStates : 1
Int64ShaderOps : 1
RootSignature.HighestVersion : D3D_ROOT_SIGNATURE_VERSION_1_1 (2)
DepthBoundsTestSupported : 1
ProgrammableSamplePositionsTier : D3D12_PROGRAMMABLE_SAMPLE_POSITIONS_TIER_2 (2)
ShaderCache.SupportFlags : D3D12_SHADER_CACHE_SUPPORT_SINGLE_PSO | LIBRARY | AUTOMATIC_INPROC_CACHE (7) (0b0000'0111)
CopyQueueTimestampQueriesSupported : 1
CastingFullyTypedFormatSupported : 1
WriteBufferImmediateSupportFlags : D3D12_COMMAND_LIST_SUPPORT_FLAG_DIRECT | BUNDLE | COMPUTE | COPY (15) (0b0000'1111)
ViewInstancingTier : D3D12_VIEW_INSTANCING_TIER_1 (1)
BarycentricsSupported : 0
ExistingHeaps.Supported : 1
Click to expand...

The official launch driver for Raven Ridge does this:
Direct3D 12 feature checker (January 2018) by DmitryKo (x64)
https://forum.beyond3d.com/posts/1840641/

Windows 10 version 1709 (build 16299.214) x64
Checking for experimental shader models

ADAPTER 0
"AMD Radeon(TM) Vega 8 Graphics"
VEN_1002, DEV_15DD, SUBSYS_D0001458, REV_C8
Dedicated video memory : 2033.5 MB (2132267008 bytes)
Total video memory : 9175.7 MB (9621407744 bytes)
Video driver version : 23.20.827.0
Maximum feature level : D3D_FEATURE_LEVEL_12_1 (0xc100)
DoublePrecisionFloatShaderOps : 1
OutputMergerLogicOp : 1
MinPrecisionSupport : D3D12_SHADER_MIN_PRECISION_SUPPORT_16_BIT (2) (0b0000'0010)
TiledResourcesTier : D3D12_TILED_RESOURCES_TIER_3 (3)
ResourceBindingTier : D3D12_RESOURCE_BINDING_TIER_3 (3)
PSSpecifiedStencilRefSupported : 1
TypedUAVLoadAdditionalFormats : 1
ROVsSupported : 1
ConservativeRasterizationTier : D3D12_CONSERVATIVE_RASTERIZATION_TIER_3 (3)
StandardSwizzle64KBSupported : 0
CrossNodeSharingTier : D3D12_CROSS_NODE_SHARING_TIER_NOT_SUPPORTED (0)
CrossAdapterRowMajorTextureSupported : 0
VPAndRTArrayIndexFromAnyShaderFeedingRasterizerSupportedWithoutGSEmulation : 1
ResourceHeapTier : D3D12_RESOURCE_HEAP_TIER_2 (2)
MaxGPUVirtualAddressBitsPerResource : 40
MaxGPUVirtualAddressBitsPerProcess : 40
Adapter Node 0: TileBasedRenderer: 0, UMA: 1, CacheCoherentUMA: 0, IsolatedMMU: 1
HighestShaderModel : D3D12_SHADER_MODEL_6_0 (0x0060)
WaveOps : 1
WaveLaneCountMin : 64
WaveLaneCountMax : 64
TotalLaneCount : 512
ExpandedComputeResourceStates : 1
Int64ShaderOps : 1
RootSignature.HighestVersion : D3D_ROOT_SIGNATURE_VERSION_1_1 (2)
DepthBoundsTestSupported : 1
ProgrammableSamplePositionsTier : D3D12_PROGRAMMABLE_SAMPLE_POSITIONS_TIER_2 (2)
ShaderCache.SupportFlags : D3D12_SHADER_CACHE_SUPPORT_SINGLE_PSO | LIBRARY (3) (0b0000'0011)
CopyQueueTimestampQueriesSupported : 0
CastingFullyTypedFormatSupported : 1
WriteBufferImmediateSupportFlags : D3D12_COMMAND_LIST_SUPPORT_FLAG_DIRECT | BUNDLE | COMPUTE | COPY (15) (0b0000'1111)
ViewInstancingTier : D3D12_VIEW_INSTANCING_TIER_NOT_SUPPORTED (0)
BarycentricsSupported : 0
ExistingHeaps.Supported : 1
Click to expand...
Additionally, Graphics preemption for Vega 8/Vega 11 regresses back from Primitive to DMA Buffer.
 
Hi,
NV 397.31 drivers which are first with WDDM 2.4 support are ready..
diff on GTX 970 vs older drivers seem to be:
WriteBufferImmediateSupportFlags | VIDEO_DECODE | VIDEO_PROCESS
ReservedBufferPlacementSupported : 1
SharedResourceCompatibilityTier : D3D12_SHARED_RESOURCE_COMPATIBILITY_TIER_1 (1)
I get Native16BitShaderOpsSupported=0, would be nice if someone tests on Pascal/Titan V for seeing if
Native16BitShaderOpsSupported is 1 there..
also I get
AtomicShaderInstructions : 0
this flag is for Cross Node attributes, right?
Anyone with SLI setup gets this flag to one?
finally Windows ARM64 is there:
and RS4 builds are getting there also:
"Fudzilla can confirm that one of the Snapdragon 835 powered Asus TP370 QL machines we are currently playing with has got a Redstone update just at the same time as one of the Intel X86 machines got the preview release update."
see: Winhttps://www.fudzilla.com/news/46131-windows-rs-4-might-be-the-april-update
anybody can post some dxdiag on these machinges like Asus TP370 QL to see what WDDM version is Qualcomm shipping.. already on WDDM 2.4?
finally someone who posts some D3D12CheckFeatureSupport on ARM64 info to see Adreno D3D12 features..
thanks..
my report:
"NVIDIA GeForce GTX 970"
VEN_10DE, DEV_13C2, SUBSYS_31601462, REV_A1
Dedicated video memory : 4043.6 MB (4240048128 bytes)
Total video memory : 20406.0 MB (21397284864 bytes)
Video driver version : 24.21.13.9731
Maximum feature level : D3D_FEATURE_LEVEL_12_1 (0xc100)
DoublePrecisionFloatShaderOps : 1
OutputMergerLogicOp : 1
MinPrecisionSupport : D3D12_SHADER_MIN_PRECISION_SUPPORT_NONE (0) (0b0000'0000)
TiledResourcesTier : D3D12_TILED_RESOURCES_TIER_3 (3)
ResourceBindingTier : D3D12_RESOURCE_BINDING_TIER_3 (3)
PSSpecifiedStencilRefSupported : 0
TypedUAVLoadAdditionalFormats : 1
ROVsSupported : 1
ConservativeRasterizationTier : D3D12_CONSERVATIVE_RASTERIZATION_TIER_1 (1)
StandardSwizzle64KBSupported : 0
CrossNodeSharingTier : D3D12_CROSS_NODE_SHARING_TIER_NOT_SUPPORTED (0)
CrossAdapterRowMajorTextureSupported : 0
VPAndRTArrayIndexFromAnyShaderFeedingRasterizerSupportedWithoutGSEmulation : 1
ResourceHeapTier : D3D12_RESOURCE_HEAP_TIER_1 (1)
MaxGPUVirtualAddressBitsPerResource : 40
MaxGPUVirtualAddressBitsPerProcess : 40
Adapter Node 0: TileBasedRenderer: 0, UMA: 0, CacheCoherentUMA: 0, IsolatedMMU: 1, HeapSerializationTier: 0
HighestShaderModel : D3D12_SHADER_MODEL_6_1 (0x0061)
WaveOps : 1
WaveLaneCountMin : 32
WaveLaneCountMax : 32
TotalLaneCount : 26624
ExpandedComputeResourceStates : 1
Int64ShaderOps : 1
RootSignature.HighestVersion : D3D_ROOT_SIGNATURE_VERSION_1_1 (2)
DepthBoundsTestSupported : 1
ProgrammableSamplePositionsTier : D3D12_PROGRAMMABLE_SAMPLE_POSITIONS_TIER_2 (2)
ShaderCache.SupportFlags : D3D12_SHADER_CACHE_SUPPORT_SINGLE_PSO | LIBRARY (3) (0b0000'0011)
CopyQueueTimestampQueriesSupported : 1
CastingFullyTypedFormatSupported : 1
WriteBufferImmediateSupportFlags : D3D12_COMMAND_LIST_SUPPORT_FLAG_DIRECT | BUNDLE | COMPUTE | COPY | VIDEO_DECODE | VIDEO_PROCESS (63) (0b0011'1111)
ViewInstancingTier : D3D12_VIEW_INSTANCING_TIER_2 (2)
BarycentricsSupported : 0
ExistingHeaps.Supported : 1
ReservedBufferPlacementSupported : 1
SharedResourceCompatibilityTier : D3D12_SHARED_RESOURCE_COMPATIBILITY_TIER_1 (1)
Native16BitShaderOpsSupported : 0
AtomicShaderInstructions : 0
 
Intel also has released WDDM 2.4 driver (-NEW- 24.20.100.6025) (they claim also Shader Model 6.2 altough with my Intel HD 530 seems getting only Shader model 6.1 tough +WDDM 2.1 only)
http://www.geeks3d.com/forums/index.php/topic,5414.0.html
hope someone with Kabylake or Coffelake can post report..

Also seems AMD is the latest to party altough hope by April 30 we have 18.4.1 or 18.5.1 if delayed few days..

"Intel(R) HD Graphics 530"
VEN_8086, DEV_1912, SUBSYS_D0001458, REV_06
Dedicated video memory : 128.0 MB (134217728 bytes)
Total video memory : 16454.4 MB (17253705728 bytes)
Video driver version : 24.20.100.6025
Maximum feature level : D3D_FEATURE_LEVEL_12_1 (0xc100)
DoublePrecisionFloatShaderOps : 1
OutputMergerLogicOp : 1
MinPrecisionSupport : D3D12_SHADER_MIN_PRECISION_SUPPORT_16_BIT (2) (0b0000'0010)
TiledResourcesTier : D3D12_TILED_RESOURCES_TIER_3 (3)
ResourceBindingTier : D3D12_RESOURCE_BINDING_TIER_3 (3)
PSSpecifiedStencilRefSupported : 1
TypedUAVLoadAdditionalFormats : 1
ROVsSupported : 1
ConservativeRasterizationTier : D3D12_CONSERVATIVE_RASTERIZATION_TIER_3 (3)
StandardSwizzle64KBSupported : 0
CrossNodeSharingTier : D3D12_CROSS_NODE_SHARING_TIER_NOT_SUPPORTED (0)
CrossAdapterRowMajorTextureSupported : 1
VPAndRTArrayIndexFromAnyShaderFeedingRasterizerSupportedWithoutGSEmulation : 1
ResourceHeapTier : D3D12_RESOURCE_HEAP_TIER_2 (2)
MaxGPUVirtualAddressBitsPerResource : 38
MaxGPUVirtualAddressBitsPerProcess : 48
Adapter Node 0: TileBasedRenderer: 0, UMA: 1, CacheCoherentUMA: 1, IsolatedMMU: 1, HeapSerializationTier: 0
HighestShaderModel : D3D12_SHADER_MODEL_6_1 (0x0061)
WaveOps : 1
WaveLaneCountMin : 8
WaveLaneCountMax : 32
TotalLaneCount : 768
ExpandedComputeResourceStates : 1
Int64ShaderOps : 1
RootSignature.HighestVersion : D3D_ROOT_SIGNATURE_VERSION_1_1 (2)
DepthBoundsTestSupported : 0
ProgrammableSamplePositionsTier : D3D12_PROGRAMMABLE_SAMPLE_POSITIONS_TIER_NOT_SUPPORTED (0)
ShaderCache.SupportFlags : D3D12_SHADER_CACHE_SUPPORT_SINGLE_PSO | LIBRARY (3) (0b0000'0011)
CopyQueueTimestampQueriesSupported : 0
CastingFullyTypedFormatSupported : 0
WriteBufferImmediateSupportFlags : D3D12_COMMAND_LIST_SUPPORT_FLAG_NONE (0) (0b0000'0000)
ViewInstancingTier : D3D12_VIEW_INSTANCING_TIER_NOT_SUPPORTED (0)
BarycentricsSupported : 0
ExistingHeaps.Supported : 0
ReservedBufferPlacementSupported : 0
SharedResourceCompatibilityTier : D3D12_SHARED_RESOURCE_COMPATIBILITY_TIER_0 (0)
Native16BitShaderOpsSupported : 0
AtomicShaderInstructions : 0
 
Ok AMD 18.4.1 WDDM 2.4 results
(seems still Shader Model 6.1 altough also in non experimental mode!)
only changes:
ReservedBufferPlacementSupported : 1
SharedResourceCompatibilityTier : D3D12_SHARED_RESOURCE_COMPATIBILITY_TIER_1 (1)

strange as was expecting Native16BitShaderOpsSupported to be 1 here exposing RPM!

ADAPTER 0
"Radeon RX Vega"
VEN_1002, DEV_687F, SUBSYS_6B761002, REV_C1
Dedicated video memory : 8121.3 MB (8515833856 bytes)
Total video memory : 24483.7 MB (25673070592 bytes)
Video driver version : 24.20.11001.5003
Maximum feature level : D3D_FEATURE_LEVEL_12_1 (0xc100)
DoublePrecisionFloatShaderOps : 1
OutputMergerLogicOp : 1
MinPrecisionSupport : D3D12_SHADER_MIN_PRECISION_SUPPORT_16_BIT (2) (0b0000'0010)
TiledResourcesTier : D3D12_TILED_RESOURCES_TIER_3 (3)
ResourceBindingTier : D3D12_RESOURCE_BINDING_TIER_3 (3)
PSSpecifiedStencilRefSupported : 1
TypedUAVLoadAdditionalFormats : 1
ROVsSupported : 1
ConservativeRasterizationTier : D3D12_CONSERVATIVE_RASTERIZATION_TIER_3 (3)
StandardSwizzle64KBSupported : 0
CrossNodeSharingTier : D3D12_CROSS_NODE_SHARING_TIER_NOT_SUPPORTED (0)
CrossAdapterRowMajorTextureSupported : 0
VPAndRTArrayIndexFromAnyShaderFeedingRasterizerSupportedWithoutGSEmulation : 1
ResourceHeapTier : D3D12_RESOURCE_HEAP_TIER_2 (2)
MaxGPUVirtualAddressBitsPerResource : 44
MaxGPUVirtualAddressBitsPerProcess : 44
Adapter Node 0: TileBasedRenderer: 0, UMA: 0, CacheCoherentUMA: 0, IsolatedMMU: 1, HeapSerializationTier: 0
HighestShaderModel : D3D12_SHADER_MODEL_6_1 (0x0061)
WaveOps : 1
WaveLaneCountMin : 64
WaveLaneCountMax : 64
TotalLaneCount : 3584
ExpandedComputeResourceStates : 1
Int64ShaderOps : 1
RootSignature.HighestVersion : D3D_ROOT_SIGNATURE_VERSION_1_1 (2)
DepthBoundsTestSupported : 1
ProgrammableSamplePositionsTier : D3D12_PROGRAMMABLE_SAMPLE_POSITIONS_TIER_2 (2)
ShaderCache.SupportFlags : D3D12_SHADER_CACHE_SUPPORT_SINGLE_PSO | LIBRARY | AUTOMATIC_INPROC_CACHE | AUTOMATIC_DISK_CACHE (15) (0b0000'1111)
CopyQueueTimestampQueriesSupported : 1
CastingFullyTypedFormatSupported : 1
WriteBufferImmediateSupportFlags : D3D12_COMMAND_LIST_SUPPORT_FLAG_DIRECT | BUNDLE | COMPUTE | COPY (15) (0b0000'1111)
ViewInstancingTier : D3D12_VIEW_INSTANCING_TIER_1 (1)
BarycentricsSupported : 0
ExistingHeaps.Supported : 1
ReservedBufferPlacementSupported : 1
SharedResourceCompatibilityTier : D3D12_SHARED_RESOURCE_COMPATIBILITY_TIER_1 (1)
Native16BitShaderOpsSupported : 0
AtomicShaderInstructions : 0
 
Radeon R9 380X

Code: 
Windows 10 version 1803 (build 17134.5) x64

ADAPTER 0
"AMD Radeon (TM) R9 380 Series"
VEN_1002, DEV_6938, SUBSYS_E308174B, REV_F1
Dedicated video memory : 4071.4 MB (4269203456 bytes)
Total video memory : 12259.1 MB (12854618112 bytes)
Video driver version : 24.20.11001.5003
Maximum feature level : D3D_FEATURE_LEVEL_12_0 (0xc000)
DoublePrecisionFloatShaderOps : 1
OutputMergerLogicOp : 1
MinPrecisionSupport : D3D12_SHADER_MIN_PRECISION_SUPPORT_NONE (0) (0b0000'0000)
TiledResourcesTier : D3D12_TILED_RESOURCES_TIER_2 (2)
ResourceBindingTier : D3D12_RESOURCE_BINDING_TIER_3 (3)
PSSpecifiedStencilRefSupported : 1
TypedUAVLoadAdditionalFormats : 1
ROVsSupported : 0
ConservativeRasterizationTier : D3D12_CONSERVATIVE_RASTERIZATION_TIER_NOT_SUPPORTED (0)
StandardSwizzle64KBSupported : 0
CrossNodeSharingTier : D3D12_CROSS_NODE_SHARING_TIER_NOT_SUPPORTED (0)
CrossAdapterRowMajorTextureSupported : 0
VPAndRTArrayIndexFromAnyShaderFeedingRasterizerSupportedWithoutGSEmulation : 1
ResourceHeapTier : D3D12_RESOURCE_HEAP_TIER_2 (2)
MaxGPUVirtualAddressBitsPerResource : 40
MaxGPUVirtualAddressBitsPerProcess : 40
Adapter Node 0:     TileBasedRenderer: 0, UMA: 0, CacheCoherentUMA: 0, IsolatedMMU: 1, HeapSerializationTier: 0
HighestShaderModel : D3D12_SHADER_MODEL_6_1 (0x0061)
WaveOps : 1
WaveLaneCountMin : 64
WaveLaneCountMax : 64
TotalLaneCount : 2048
ExpandedComputeResourceStates : 1
Int64ShaderOps : 1
RootSignature.HighestVersion : D3D_ROOT_SIGNATURE_VERSION_1_1 (2)
DepthBoundsTestSupported : 1
ProgrammableSamplePositionsTier : D3D12_PROGRAMMABLE_SAMPLE_POSITIONS_TIER_2 (2)
ShaderCache.SupportFlags : D3D12_SHADER_CACHE_SUPPORT_SINGLE_PSO | LIBRARY | AUTOMATIC_INPROC_CACHE | AUTOMATIC_DISK_CACHE (15) (0b0000'1111)
CopyQueueTimestampQueriesSupported : 1
CastingFullyTypedFormatSupported : 1
WriteBufferImmediateSupportFlags : D3D12_COMMAND_LIST_SUPPORT_FLAG_DIRECT | BUNDLE | COMPUTE | COPY (15) (0b0000'1111)
ViewInstancingTier : D3D12_VIEW_INSTANCING_TIER_1 (1)
BarycentricsSupported : 0
ExistingHeaps.Supported : 1
ReservedBufferPlacementSupported : 1
SharedResourceCompatibilityTier :  D3D12_SHARED_RESOURCE_COMPATIBILITY_TIER_1 (1)
Native16BitShaderOpsSupported : 0
AtomicShaderInstructions : 0

Same result in experimental mode.
I think we will never see again FP16 on pre-vega GPUs.
I also do not understand why AMD still does not exposes barycentric semantic in D3D12since SM 6.1 is now supported (on D3D11,OpenGL and Vulkan all GCN should support it).
 
You must log in or register to reply here.
Back
Top