Detail Layout of PS3 Cell Architecture and On-Chip Communication Interconnect .

Humm...

Someone correct me if I’m wrong here or that I’m misreading something. I thought the Cell processor architecture was specifically an out of order design!? Why does it (page 10) have it listed as an in-order superscalar design? Is that statement just specifically designated for the PPC and not the SPE’s?
 
Where have you been for the last 2 years? :smile: The slide seems to be just the summary of what's known so far...

I just wanted too post a nice (IMO) doc of Cell architecture and workings. I haven’t seen this particular doc, so I posted for those who might like it also. :D
 
I'd be so bold as saying that it's fortunately not OOO.
 
I'd be so bold as saying that it's fortunately not OOO.

I suppose the argument could be made that Cell would have just been too awesome if it had an average of 50% more performance.

If Cell had been on a later process node, it probably wouldn't have been a bad thing if the PPE at least had some OoO capability.
 
I suppose the argument could be made that Cell would have just been too awesome if it had an average of 50% more performance.

If Cell had been on a later process node, it probably wouldn't have been a bad thing if the PPE at least had some OoO capability.

True enough, though I think OoO is one of the very most difficult things to engineer into a CPU core. If IBM had enough real estate to fit it all on, and had worked out the process limitations that kept their earlier PowerPC cores down around 2 ghz, it would indeed have been nice to get the OoO in there.

But if they had that much real estate, they might have done better with a second in-order PPE on board, or perhaps more SPEs. Gaming doesn't have the same needs that a desktop operating system has.
 
True enough, though I think OoO is one of the very most difficult things to engineer into a CPU core. If IBM had enough real estate to fit it all on, and had worked out the process limitations that kept their earlier PowerPC cores down around 2 ghz, it would indeed have been nice to get the OoO in there.

But if they had that much real estate, they might have done better with a second in-order PPE on board, or perhaps more SPEs. Gaming doesn't have the same needs that a desktop operating system has.

Considering how narrow the PPE is, going for limited OoOE wouldn't double the size of the core. Heat output would be greater, but if the architecture wasn't too aggressive, it could be managed.
 
Heat output would be greater

Not really acceptable, I think, considering how critical an aspect of the PS3's design heat control really is. Besides, I'm sure they'd sooner have gone for an additional SPE if they could. Jonabbey is definitely right in his second part of his post above.
 
Not really acceptable, I think, considering how critical an aspect of the PS3's design heat control really is. Besides, I'm sure they'd sooner have gone for an additional SPE if they could. Jonabbey is definitely right in his second part of his post above.

My original comment was Cell were on a smaller process, that it wouldn't be painful to do so. The heat from the chip, even with an OoO PPE would be within the PS3's heat budget, if it were at a smaller node.

Cell at the current process is somewhat cramped, so it's real time to be fully realized is in the future.

Going with slimmed-down OoO on a narrow core does not double the size of the core. If there's only half of an SPE's worth of room on-die after everything else, going OoO for the one PPE would fit well enough.
 
My original comment was Cell were on a smaller process, that it wouldn't be painful to do so. The heat from the chip, even with an OoO PPE would be within the PS3's heat budget, if it were at a smaller node.

Cell at the current process is somewhat cramped, so it's real time to be fully realized is in the future.

Going with slimmed-down OoO on a narrow core does not double the size of the core. If there's only half of an SPE's worth of room on-die after everything else, going OoO for the one PPE would fit well enough.

PA Semi's PPC core is 3-way OOO superscalar. It takes up ~10 mm^2 in 65nm. Doubling that for a 90nm equivalent still results in a core that is 5 mm^2 smaller than the in-order PPE of CELL.

And that's with state of the art performance/power at a non-trivial level of performance.

Cheers
 
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