Confusion on Intel 865PE with ICH5 southbridge.

[stevem]

The 8knxp box and manual both state that the board is only VRM10.0 compliant when the daughtercard is used. Considering FMB1.5 is part of the VRM10.0 spec, it deems conclusive that that means using the daughtercard will enable FMB1.5 which is a prerequisite for Prescott.

I'm afraid that's balderdash. You seem to be stuck on this nexus of VRM10=>FMB1.5=Prescott...

Perhaps we'll try this:
VRM10+FMB1.0=P4C(HT)+P4EE (existing i865/i875 boards-definately)
VRM10+FMB1.0!=Prescott (ditto-maybe)
VRM10+FMB1.5=P4C(HT)+P4EE+Prescott (new i865/i875 boards-definately & some existing boards with BIOS update-maybe)

Grab VRD 10.0 Design Guide. Clear as mud. There is a side issue of Northwood FMB2, but let's not go there... We don't know yet if a BIOS is all that's required to make 8KNXP VRM10+FMB1.5 compliant... (I haven't even bothered peeking in the beta BIOSes to see if there's any hints.) The 8KNXP is VRM10 FMB1.0 compliant with or without the DPS module. That's why you can run a P4C 3.2 without it... It may even turn out the 8KNXP supports PGA478 Prescott without the DPS module...

Now onto specifics. Box inside front & back cover: "DPS2: Featuring new VRM10.0 specification with more precise voltage readings and ready for future processor" If we want to be anal, it's processor [singular]. So does that mean P4EE...? No FMB spec. No other mention except for 6-phases yada-yada... Manual: P18 DPS2, no mention of VRM spec. P71 DPS2, no mention of VRM spec. (You owe me for having to find & flick through the manual... )

I said it looks exactly the same, not that it is exactly the same. The layout of the P4C800 looks identical to the 8KNXP save for the DPS and the fact that the 8KNXP has 6 DIMMS while the P4C800 only has 4.

I'm astounded... By that logic two ATX boards will perform the same because they're ATX...

Where'd you get this information?

Ehh.. Given my recommendation re: DMM & readings proffered, you're surely in jest...Do you suspect I may have cursorily passed some probes over the boards during assembly/tweaking...?

I actually had to change the default sensor in order to get accurate readings. I'm at work right now so I can't give you the sensor name.

The guys from the MBM forum who collaborated on the sensor/multiplier data for the 8KNXP did so by using empirical results to fit a priori expectations for MBM sensor output values... I would've been more impressed had someone bothered to yank out a CRO & undertake a correct calibration of the sensor/BIOS/software... Not that I'm suggesting it's warranted for a motherboard...

Where are you getting this? I haven't been able to find any documentation on TP anywhere.

What was that about research again? Given that I mentioned Gigabyte tech, perhaps it came from them?

So the bios is lying to me?? :?

No. TP isn't an option that's recommended. The warning before use is a dead giveaway. Gigabyte engineers want to enable features/performance options, but are afraid of end-user panic/RMAs, etc. They massage the output to coddle end-user sensibilities... We also don't know what compromises are involved at the board & BIOS level. Tell me you know about PAT auto-disabling when OCing by a margin of >10%.

Yes we can take this to PM since we aren't even discussing the original topic anymore anyways.

Let's call it a day. Check out some motherboard specific sites, there's loads of info.

Joe

Apropos to the above, sorry for the thread derail. The 8KNXP is a great board, full-featured & stable, but I'd consider a newer series board in your case. Gigabyte will have the new GT4 boards out soon & the new Abit boards look tasty. I suspect most OEMs will include new products with pesky AI features. I'll add one other opinion: There are two strategies for DDR performance. Low latency & default/low OC for ~5GB/s or high latency/high FSB (1:1 ratios) & reclaim latency penalties through extreme bandwidth (>6GB/s). Current revision i865/i875 boards don't perform brilliantly in async modes. Check the usual suspects for reviews/forum discussion. Madshrimps had a useful article on the DDR saga. More an issue for early adopters, than now I suspect.

Apologies for the quotarama, gasbagging & kurtness of response. Unintended result of a deadline... Corrections/input is most welcome.

 

[Natoma]

Correct. Existing VRM10 designs need only be qualified as per FMB1.5 spec. It doesn't follow that VRM10 automatically means FMB1.5."

And according to Intel, the only thing required for socket478 prescott support is FMB1.5.

Now that is what completely confuses me. VRM10 motherboard designs have to be qualified to the FMB1.5 spec, but that doesn't mean that they are FMB1.5? You say that I'm stuck on some nexus that VRM10 means FMB1.5 and yet you're stating this yourself?

:?

How is what you stated any different than what I stated, i.e.,

The 8knxp box and manual both state that the board is only VRM10.0 compliant when the daughtercard is used. Considering FMB1.5 is part of the VRM10.0 spec, it deems conclusive that that means using the daughtercard will enable FMB1.5 which is a prerequisite for Prescott.

Again, you said that the box states VRM10.0 spec. Since you stated above that existing VRM10 designs need to be qualified for FMB1.5, and FMB1.5 is what is required for Prescott, is it not a fair assessment to say that the 8KNXP with VRM10 will indeed support Prescott? No mention of the FMB spec required, nor did I ever say it was mentioned. Just deduction from the available information.

Also, I read the VRD 10.0 Design Guide from the Intel website. Considering there's nary a peep about FMB1.5 in it, and it only speaks about FMB2 (which you mentioned), I see how it's clear as mud.

As for the comments regarding the TP readings/documentation, obviously I didn't make the connection or I wouldn't have asked. And yes, I know PAT is disabled during an overclock, but I wasn't aware it was >10%. I thought it disabled once you went over 215Mhz FSB?