Can you make a CPU with just one instruction per execution unit?

[Flux]

Is it possible to make a cpu (say an arm) that is a bunch of smaller multiplier units(like in the Spartan ASIC cores) executing only one execution per multiplier. The instructions are 32bit wide ARM9 instructions that are one on a single logic block for each multiplier. The multipler units are used as execution units.
Is this possible or is it useless/obsolete?

 

[Novum]

You could use separate logic for each instruction type, but you can not execute a branch instruction on a multiplier.

The topics you started lately are all very strange. What are you tying to do? Are these exam questions?

 

[Flux]

I just want to understand computer hardware on the instruction set level.

 

[Novum]

And why are you always referring to FPGAs with dedicated multipliers? Where does that idea come from?

Xilinx Spartan FPGA have these multipliers primarily to accelerate DSP algorithms, not to implement CPU execution units. Perhaps you could use them for the multiplier unit of a CPU, but not for much else.

 

[metafor]

Sure but why? You'd need a lot of multipliers and you'd still need to decode the instruction and pass it through a routing network to the right multiplier. That'll probably end up costing more both in terms of power and logic than just using a configurable multiplier.

 

[Blazkowicz]

you can make a one instruction processor
http://en.wikipedia.org/wiki/One_instruction_set_computer

 

[Davros]

at least writing programs for it should be easy

 

[Npl]

at least writing programs for it should be easy

Why would that be?
There are already languages which focus on "simplicity" in terms of used constructs, just look at this one. Doesnt makes it exactly easy

 

[Frank]

A multiplier is a rather wide or complex unit, which only makes sense if you want a high IPC (Instructions Per Clock) or want to do DSP/GPU work (MAD).

If you want to go the many parallel execution units path, you're better off using simple instructions and lots of registers (RISC). ADDC and shift instructions are all that is needed to multiply, and you can simply split the load over multiple execution units.

The more interesting question would be: do you want the program to directly control the execution units, or are you going to create a lot of control logic that makes it transparent to the program? In the first case, the memory bandwidth is almost certainly your bottleneck, in the second it is probably simpler to make some dedicated multiply units.


Btw, you don't actually need branch or conditional instructions, as long as you can use the PC and flags as regular registers. But it's a lot easier.