AMD Vega 10, Vega 11, Vega 12 and Vega 20 Rumors and Discussion

Did someone say magnum?

Spoiler

But more seriously though, is Vega using 8-high stacks of hbm2 or denser memory chips or something? From bandwidths, it looks like Vega 10 has two stacks and Vega 11 has one stack, unless I'm missing something.

EDIT Also good to see that amd will have a laptop-friendly vr-ready option at 100w only nearly a year after Nvidia... Better late than never, I suppose.

 

They need VR in laptops to make those VR backpacks easier to make and have longer battery life. Not sure if they will catch on.

 

When's the earliest that we expect to see 8-hi HBM2 stacks?

I should have made this clear in my post, but the "laptop Vega 11" is my speculation only. That being said, I don't see why there couldn't be one with the abovementioned specs.

 

Clamshell for capacity makes a lot more sense than 8-hi stacks.

As for Magnum, that could be a miner's dream if the capabilities are right. Encryption and AV codecs would be fairly similar. Just imagine those MxGPU blades with a bunch of FPGAs churning away. They'd just need to be consumer level affordable.

 

I'm not as concerned with the 7 TFLOPs that this GPU could crank out with a 130W power limit. That's a relatively limited set of chunky laptops.

100W opens more doors and if Vega 11 can still meet the VR min spec at 100W, then that might be valuable to beat back Nvidia's dominant laptop lineup.

I'd say it's a chicken-egg issue. You can't market mobile VR until you have tech that can accomplish it.

But no matter what, VR is a completely virgin market and you better believe that everybody and their sister wants a piece. PC gaming is a pretty saturated market and has been for quite a while, so I think it's a big deal.

How does that work in HBM? Would something like Vega 10 have 4 stacks that are paired off?

If this was possible, why didn't AMD consider it for Fiji? I think the "4GB issue" really hurt their brand and how the public sees their efforts at a halo product.

 

Yeah, although they could probably get away with 3 stacks with 2 paired off if they wanted. Or 3/4 grouped together on a small bus. Bandwidth stays the same when grouping so it's kind of wasteful unless you really need the space. Clamshell is basically just putting multiple memory chips on the same bus to increase capacity.

Fiji had 4 stacks with a huge die and barely fit everything on the interposer. There simply wouldn't be any room for it. There are bandwidth difference between the HBM generations so 2 stacks of HBM2 is equivalent to 4 stacks of HBM1.

 

That's going to be interesting if they actually do try to slot that into the price bracket that Rx 480 occupies. But it seems odd they would go from Rx 580 to Fury Pro with no Rx 590. Unless the salvage Vega 10 ends up being Rx 590. I guess that would make sense.

Also HBM2 in the midrange price bracket? Dunno, I'm not holding my breath on that.

Regards,
SB

 

A 7Tf Vega 11 GPU and assuming a simliar shader count as Polaris 10 would put the GPU at a frenquency of 1.5Ghz+. With a lower TDP... not bad at all.
Maybe this what Scorpio has in the end. Vega 11 with a frequency at 1.3Ghz.

 

A single stack might be sufficient for an APU or MCM with full access to system memory and have benefits beyond just graphics. This would effectively be doing away with low to mid range discrete cards in favor of larger APU/MCM SoC designs. A direction the industry seems to be moving in already. That's why I'm theorizing Polaris is the low to mid range discrete part and Vega will be the integrated low(APU)/mid(MCM) to high end solutions of the future. Maybe Polaris is just a stop-gap, but it would fill a need until AMD had Zen products that could otherwise fill those roles.

 

The more interesting bit was,

I'd just temper the expectations since the author(Khalid) also hyped Polaris and was the one showing 980+10% performance. Interestingly this article landed after the one on nvidia's Pascal refresh, something that I noticed earlier as well.

 

Would AMD be able to get enough performance out of only 256 GB/s of memory bandwidth? I was under the impression a lot of nvidia's bandwidth gains are coming from their tiled based rendering and AMD would be unable to make that up unless they switched. But then again, you should be able to overclock the HBM like the fury and then it would be >300GB/s.

 

Safe to assume that it is ignorance.

Same. I am pro-VR in the long run, but there is limited runway with it on PC as of now. I think consoles will be the first massmarket. Smartphones will simply be too weak for too long to really matter for most stuff, at least interactive stuff. Passive "explorer apps" is a different story.

 

Oculus using their new tech dropped their minimum specs to an i3 and a GeForce 960 . So a lot of laptops are now vr ready. With Polaris entering the laptop market and pascal too you should be able to get a light weight vr ready laptop for a good price in the next few months. Next year with Vega and whatever NVidia has it should be cheaper and more capable.

PSvr is fine and is cheap for those who own playstations. But $300 for a playstation + $500 for the vr head set puts you at $800 or $900 for pro. Oculus has vr ready desktops now at $500-$700 which coupled with a rift would be $1,100 to $1,400. So the difference is shrinking in price. Next year the price may be the same for a rift + deskop and the ps4 + ps vr.

 

The bit with variable wavefront size sounds fishy (ahem). It is ultimately still SIMD and you will have N processing units for each work scheduler which results in wavefront size to be constrained to a factor of N. All wavefronts less than that size would result in under-utilization of these units. If you instead choose to have variable length SIMD units like they showed in that diagram - it opens another can of worms. Creating these variable sized wavefronts is a hard problem in itself, scheduling them to keep all units equally balanced is even harder.

 

I would seriously doubt that AMD would say H1/2017 for Vega, if both chips would be out before the end of Q1/2017.

 

The information regarding the SIMD goes back to an AMD patent September 2014, in fact the diagram on WCCF looks very much like how it was presented in the patent, however can it be assumed this is actually to do with Vega and not Navi *shrug*.
http://pdfaiw.uspto.gov/.aiw?Docid=20160085551&homeurl=http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1%26Sect2=HITOFF%26d=PG01%26p=1%26u=%252Fnetahtml%252FPTO%252Fsrchnum.html%26r=1%26f=G%26l=50%26s1=%252220160085551%2522.PGNR.%26OS=DN/20160085551%26RS=DN/20160085551&PageNum=&Rtype=&SectionNum=&idkey=0637B8F2CF80
Text info on patent:
http://appft.uspto.gov/netacgi/nph-...51".PGNR.&OS=DN/20160085551&RS=DN/20160085551

Maybe he has a different source, or is pulling all the various info together to make an educated guess.
Cheers

 

Can't really even guess based on that....

WCCFtech might as well guess on all AMD graphics patents in the past couple of years will be in Vega

Looks like its just bits a pieces of rumors from all over put into one article.