AMD Vega 10, Vega 11, Vega 12 and Vega 20 Rumors and Discussion

From a gaming perspective sure, and relative to Nvidia's GP102 its level of impact may seem less impressive but it was much more of a success than one could say about Fiji and actually made financial sense for AMD this time in terms recoup R&D (not just R&D for Vega10 but the whole architecture range and importantly framework/solutions) or at least on its way to do so.
It did feel like though AMD and some analysts were trying to downplay the crypto-mining revenue over the last quarter, possibly due to the affect it had on Nvidia from an analyst-financial stock consideration (became more volatile) with forecasting.
Seems the narrative in the post event QA round table kinda more open about it than they have in the past 6 months.

 

I guess that:

1) something like this is not coming to consumer GPUs;
2) GPU clocks must be substantially clocked down, unless this part is out of PCI-E spec.

 

Does it have Vega chips?

 

Well, it has HMB2 so I guess yes?

 

Mistyped ... meant to say "does it definitely have 7nm Vega chips?"

 

The source is not saying that.

EDIT - Ok, Videocardz is, but I've seen it first on wccftech and they say it is not 7nm.

 

7nm has only been shown as 32 GB versions so far, so dual GPU should be 14nm 16 GB x2

 

AMD's move from 14nm to 7nm enabled a 1.35% performance boost using GloFo process (Deep Foundry Partnerships)?

http://www.legitreviews.com/amd-com...n-2-and-2nd-gen-threadripper-discussed_205921

 

35%

 

Pretty sure thats TSMCs 7nm process, GF has yet to even begin tapeouts.

 

35% not too shabby!

 

I would be very surprised if that was the case, AMD certainly haven't confirmed anything either way. I would expect Zen2 to be one of the test vehicle's used in GF's risk production and i would be on Zen2 SOC being manufactured at GF with GPU's at TSMC.

 

Lisa said they will use whichever foundry is ready first out of TSMC/GloFo, and TSMC is definitely first. Garry Patton of GloFo even said AMD will use them later after TSMC, calling themselves fast followers on the FinFET node, citing being a leader being too expensive.

 

And none of that conflicts with what I said.

 

Yeah TSMC was 35% performance while GF was meant to be 40% but with less gate density also slightly less efficiency relative to TSMC.
Although that figure for TSMC seems to be the 1st stage CLN7FF, one is meant to expect small gains with the TSMC UEV process (to begin with anyway) but I guess better scale of economy/BOM.

 

while also getting 2x the density and 2x the efficiency . Should make for decent chips

 

Usually, you cannot pick both the performance increase and power reduction at the same time.

later edit: … at least not to their respective full extent. I could imagine that there's some middle ground where you can compromise between the two.