AMD: Navi Speculation, Rumours and Discussion [2019]

Discussion in 'Architecture and Products' started by Kaotik, Jan 2, 2019.

  1. Bondrewd

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    Navi is Q3, as per AMD ER.
     
  2. Esrever

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    "[Navi] will be positioned below current Radeon 7 at least in terms of price point" -Lisa Su during earning call.

    She doesn't directly say it will perform less than the Radeon 7 but the tone heavily points at it being less powerful but leaves room for speculation that it would be more powerful but priced lower. Otherwise, she does say Q3 launch and that the pipeline is good.
     
  3. Ike Turner

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    I think that it is clear that the first Navi products won't have the VRAM, Bandwidth or compute power of a Radeon VII. To me, Navi has always sounded like what Polaris was to Fiji (and later Vega): aimed at the low/mid segment of the market (and consoles).
     
  4. Bondrewd

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    Well obviously these aren't HPC parts for sure.
     
  5. Entropy

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    Don’t really see how you figure that. Polaris was introduced to the market three years ago, and will likely be produced for a while yet.
    If Navi is introduced this autumn, a low cost mid life refresh could very well be in the cards. But without knowledge of either AMDs product plans or the future competitive landscape, any speculation that is years out is on thin ice.
     
  6. Frenetic Pony

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    Nah, it's compatible with tapeouts of 7nm. So assuming Navi and Zen 2 are on 7nm and not 7nm+ (any word on that?) then a switch to 6nm next year before Arcturus is an easy bet, at least for the GPUs/CPUs launching this year.

    In fact that's probably why TSMC would make it at all. A "hey come use our sorta 7nm+ node without having to re-tapeout your entire chip!" Mild improvements like this have become increasingly common as the ability to shrink silicon has ground to a halt. How many versions of the last node did each foundry have? I know it's been at least 3 for TSMC and Samsung, and like 5 for Intel (trololol)
     
  7. anexanhume

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    Arcturus is not an architecture, it’s a design instance (like Vega 20 e.g.)

    N6 is compatible with the N7 toolset, but you still have to tapeout the design again in the sense that you tapeout to order mask sets. Those masks are then unique to the new EUV process, but the feature sizes stay the exact same.

    Another benefit is that you can shrink your own IP without having to wait for your licensed IP (e.g. PHYS) vendors to shrink their own.
     
    #247 anexanhume, May 1, 2019
    Last edited: May 1, 2019
  8. iamw

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    You're right. Do $is actually very similar to nVidia's operand collector, especially LRF in operand collector. It can solve a large part of bank conflict problems, but it can't be completely avoided.So I think compilers still need to care about this.
     
  9. ToTTenTranz

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    Regardless of what she says about the pipeline, Navi is already ridiculously late, and by Q3 it will be later still.
    And in usual AMD terns, saying Q3 means the very last days of Q3 so Navi may only come late September.

    Nvidia had opened a flank with the RTX series, yet here's another lost opportunity from RTG.
     
  10. Bondrewd

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    what
     
  11. Rootax

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    My guess is they had an opportunity to launch better card performance/price wise in classic rasterisation, and they didn't ?

    Or, like it's the case for years now, AMD is a generation late again ...
     
  12. Bondrewd

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    What makes you think Navi would magically stop being better perf/$ if launched one month later?
     
  13. Rootax

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    I'm not talking about 1 month, I'm talking about the fact that they had/have nothing against RTX.
     
  14. yuri

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    The RTX series allows them to sell such weird product as Radeon VII. This wouldn't be viable without a contribution of the current RTX line.
     
  15. SpaceBeer

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    Current RX offer is quite good when it comes to perf/$. If you mean they don't have dedicated RTRT hardware, that's no big issue in my opinion. At this moment RTX is just hype. Much worse than VR was Maxwell/Fiji era (4y ago)
     
  16. Rootax

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    I was more "general". Vega was late and fight against 1070/1080. Now nVidia has another generation out, and not AMD, again... To be back on topic, I hope for them that Navi, RT or not, can have a good fight against what nvidia will have at the time. Even take the lead, instead of playing (late) catch up.
     
  17. Frenetic Pony

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    Would hardly be surprised if Navi was a good architecture for gaming. Vega was designed to be good for professional use, as per Apple's requirements, and it was. Now they're building Navi for the PS5 and assumedly for the Xbox, and AMD has reliably delivered performance per dollar in the past.

    I'd be more worried about Nvidia's seemingly eternal PR advantage. Nvidia sold far more cards during the cryptocurrency boom, despite AMD being competitive or better therein (depending on what you were doing). AMD's PR for consumers continuously fails, though any number of graphics execs have been shuffled around since the last launch with Vega, so we'll see what's different.

    Also it seems Navi will indeed be on 7nm and not 7nm+, and will switch to 6nm. Which, ok the tooling isn't quite as backwards compatible as I first assumed. But apparently still far easier to port designs between. I suppose this means a bigger Navi card, and probably new console chips, will be on 6nm next year. Whether this years Navi chips get a refresh on 6nm will probably depend on Nvidia's next consumer launch.
     
  18. Bondrewd

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    It's entering risk Q1'20.
    So no.
     
    anexanhume likes this.
  19. BoMbY

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    This is new:

    Code:
    // Pre-GFX10 target did not benefit from loop alignment
      if (!ML || DisableLoopAlignment ||
         (getSubtarget()->getGeneration() < AMDGPUSubtarget::GFX10) ||
         getSubtarget()->hasInstFwdPrefetchBug())
       return PrefAlign;
    
      // On GFX10 I$ is 4 x 64 bytes cache lines.
      // By default prefetcher keeps one cache line behind and reads two ahead.
      // We can modify it with S_INST_PREFETCH for larger loops to have two lines
      // behind and one ahead.
      // Therefor we can benefit from aligning loop headers if loop fits 192 bytes.
      // If loop fits 64 bytes it always spans no more than two cache lines and
      // does not need an alignment.
      // Else if loop is less or equal 128 bytes we do not need to modify prefetch,
      // Else if loop is less or equal 192 bytes we need two lines behind.
    
    https://reviews.llvm.org/D61529
     
  20. Esrever

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    [​IMG]
    Slide from AMD investor presentation.
    Navi is mentioned for cloud gaming. Maybe Google will use Navi in Stadia.
     
    ethernity and Lightman like this.
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