60% of the cost compared to a monolithic die with 10% overhead from using inter-chip IF.
With the cost difference they could even quadruple the IF overhead and it would still be worth it.
Vega 20 might be AMD's last big GPU.
What the ideal configuration would be?
- multiple mini-complete-gpu linked together, with a memory channel for every gpu
or
- master block with any not redundant block (like video decode), memory channels, management logic, linked to multiple slave NCU blocks
I'm not sure they would. Each paging as necessary with locality left to the programmer or driver. As a victim cache it would just pull and duplicate data as needed. The GPU should already mask the latency sufficiently.I have a little hard time figuring out how 4 or more HBCC can collaborate togheter, or basically how it can hide latencies with more than 2 blocks.
I'm thinking a pair of NCUs may make more sense. Similar to 8 core Ryzen(two cluster) design. Otherwise you would double bandwidth and capacity relative to Vega. No die shots, so I doubt there is a basis for estimating size.Anyone has done the math to calculate the size of a gpu with 16 NCU, one memory channel, and all the spare stuff? (like for epyc's
I know this refers to Epyc, but these numbers sure make a MCM GPU very appealing.
60% of the cost compared to a monolithic die with 10% overhead from using inter-chip IF.
With the cost difference they could even quadruple the IF overhead and it would still be worth it.
Vega 20 might be AMD's last big GPU.
With 1:2 DP rate, twice the memory channels and maybe some more low hanging fruit from Vega 10, even at 7nm it might be over 300mm^2. Navi being a modular multi-chip GPU I think it each die would be in the 200-250mm^2 range. That's the die size AMD is using for Zen and Polaris, for example.If Vega 20 is built on 7nm as the rumors suggest, it's hardly big.
If Vega 20 is built on 7nm as the rumors suggest, it's hardly big.
There still isn't "14nm+" process and we have no idea how many chances Navi will be bringingThere's no point in 7nm Vega, because that's what Navi essentially is.
Vega 20 is HPC only, fabbed on 14nm+.
Supposedly watermarkAccording to these leaks that so far have been pretty accurate so far, Vega 20 is coming next year at 7nm:
The roadmap doesn't show it as a gaming card, though. It's a direct replacement to Hawaii for HPC DP compute. The 4 stacks might be there mostly to reach the 32GB total HBC, which seems to be pretty relevant for DP compute.
Is that a censored dong coming out of the GPU?
That's CheckerBoard Rendering.
According to these leaks that so far have been pretty accurate so far, Vega 20 is coming next year at 7nm:
The roadmap doesn't show it as a gaming card, though. It's a direct replacement to Hawaii for HPC DP compute. The 4 stacks might be there mostly to reach the 32GB total HBC, which seems to be pretty relevant for DP compute.
Well, GloFo does claim risk production H1/18 ramping to mass production H2/18I would have expected there would have been heck of a lot more news regarding 7nm progress if it is going to be used for mass production of 15B transistor chips in less than a year from now. In fact, Vega 20 should be taping out right about now to hit 2H18 schedule.
According to these leaks that so far have been pretty accurate so far, Vega 20 is coming next year at 7nm:
The roadmap doesn't show it as a gaming card, though. It's a direct replacement to Hawaii for HPC DP compute. The 4 stacks might be there mostly to reach the 32GB total HBC, which seems to be pretty relevant for DP compute.