This new patent is from Mr. Kahle, director of the CELL Project.
So we learn APUs (that are no longer called that way, now they call them SPU, Synergistic Processing Unit) can have or can share a L1 cache memory, moreover each SPU has a local memory, as we already know
The patent is about a DMA prefetching mechanism, adn to be fair it's quite vague about it..
DMA prefetch
ciao,
Marco
So we learn APUs (that are no longer called that way, now they call them SPU, Synergistic Processing Unit) can have or can share a L1 cache memory, moreover each SPU has a local memory, as we already know
The patent is about a DMA prefetching mechanism, adn to be fair it's quite vague about it..
DMA prefetch
ciao,
Marco