New Cell Resources

Titanio

Legend
IBM has updated the Cell developerworks site with some new links to various resources for those interested in and programming for Cell.

First, IBM has added a Cell section to the IBM Education Assistant - basically an online "virtual classes" resource. There are lots of presentations here covering various aspects relating to Cell and Cell development. They are all new to me, and most seem to be quite recent.

http://publib.boulder.ibm.com/infocenter/ieduasst/v1r1m0/index.jsp

I've only scanned through some of them. There's one that presents IBM cell blades - you might be interested to know that these will be retailing from ~$50k for a basic "blade-only" system! Like I say, there are others, covering for example in more detail techniques used in the TRE application and so on. Some of the presentations just have placeholder content, particularly in the "Application Development" section - some of those look very interesting, should be great when they come online. Seems like it'll be a great resource.

Also worth mentioning is that a game developer has set up http://www.cellperformance.com/ - a site for sharing cell programming knowledge and discussion. Already has a number of quite detailed and practical articles, though I've not read through them all yet.

All this stuff could be very useful for anyone looking into homebrew and PS3 coding! Really ought to find more time to do more work on the simulator myself.
 
Good find Titanio. Can you point out where in the first document tCell blade pricing is alluded to though? I've been curious about that for a while.

The CellPerformance site is cool too; hopefully more grassroots Cell-focused assist guides begin to sprout up.
 
Thanks for the link.

It's a little confusing how they just jump around between the 2.4GHz and 3.2GHz versions of the BE Blade, seemingly at random. The prices indicated seem to apply to the current 2.4GHz prototype blades, so hopefully they'll come down come Q306 when their 'mass market' push (if you can call it that) begins.

Another interesting tidbit was the TDP figures given for the 3.2GHz blade; max 110 for the Cell itself, and 2.5 per XDR module. The Cell figure is especially interesting considering how IBM's own numbers, and reasserted in the Berkeley report, seem to indicate an average operating wattage sub-50... so I wonder just what the real world average actually is, and if indeed it hovers around 50 watts, what can push the chip to a near doubling under even extreme useage scenarios?

The RAM figures seem a little confusing themselves on the side. It gives 512MB of XDR at 10 modules, giving 51.2 megs per module. Isn't that figure a little weird? Yet such is clearly visible on the motherboard.

I'm not sure if we already have the Cell packaging dimensions also, but using the PCI slot as reference, we could extrapolate the dimensions to waste some time and derive another Cell-related factoid. ;)
 
At least some of the PDFs on that site are just recycled versions of other presentations.

That $50K price is old. I heard it a year or more ago but it was later cut.

The 110 Watt figure I heard a while back but that's at 1.1v, it's not entirely clearly what frequency that is as the blade will go to 4.0GHz.

It looks like the Cells will be binned by power usage so the PS3 chips will run at 0.9v which wont be anywhere near 110W.


BTW Has nobody else noticed the reference to the "Cell BE DP" or "Cell BE DP blade" ???
 
ADEX said:
It looks like the Cells will be binned by power usage so the PS3 chips will run at 0.9v which wont be anywhere near 110W.

Where'd you get the PS3 0.9 figure? I've been wondering. Yeah that'll be great for power if true. And are you sure that the TDP figures accounted for 4GHz operation? I didn't see a blade reference to 4GHz in that slideshow.

BTW Has nobody else noticed the reference to the "Cell BE DP" or "Cell BE DP blade" ???

Indeed! Good catch, I'd missed that. Hard to say what it means ultimately since some of their info in the slides basically equates to 'tentative.' But anything that points to work on the DP-improved version of the chip is always of interest. I wonder if they'll go the Cell+ route suggested in the Berkeley paper, since it seems to both yield great results and be more or less trivial in terms of implementation.
 
Thanks!

xbdestroya said:
The CellPerformance site is cool too; hopefully more grassroots Cell-focused assist guides begin to sprout up.

Thanks! I appreciate that!

The goal of CellPerformance.com really is to help the whole Cell community. In the past, we (console game developers) haven't had much opportunity to speak publically about the nitty-gritty details of the hardware and our strategies for performance. This time, however, because the Cell is well-documented publically, we are actually able to help out the independent and homebrew developers with the low-level details.

You might be interested in knowing that IBM has announced a free Cell workshop. Registration link

Thanks for visiting the site guys. And make sure to let me know if there's something that isn't clear, or if there is something in particular you'd like to see covered.

Mike.
 
I did not read the links etc. so I will ask here instead, how are these so called blades configured? One big node? Or several nodes and if several nodes how does the graph look like? Thanks in advance.
 
Where'd you get the PS3 0.9 figure?

The RealWorldTech series last year.


And are you sure that the TDP figures accounted for 4GHz operation? I didn't see a blade reference to 4GHz in that slideshow.

I'm not sure at all, I'm wondering if IBM are doing what AMD used to do and just quote the maximum figure for the highest freq processor (AMD used to quote 89W for several different frequencies).

They mentioned the blades will go to 4GHz a while back.

I wonder if they'll go the Cell+ route suggested in the Berkeley paper, since it seems to both yield great results and be more or less trivial in terms of implementation.

Not sure but they have a design for a fully pipelined version, it should be quite a bit faster again than Cell+ on DP stuff.
 
ADEX said:
I'm not sure at all, I'm wondering if IBM are doing what AMD used to do and just quote the maximum figure for the highest freq processor (AMD used to quote 89W for several different frequencies).

Yeah, well thats the honest way to go, i bet many with esp Venice 3200+ has them at 2400-600MHz atleast.
Not sure but they have a design for a fully pipelined version, it should be quite a bit faster again than Cell+ on DP stuff.

Yeah it would make sense in the enviroment and especially to get a more widespreed use of Cell. It was very little silicon to increase the DP as you and others said relative to the potentionaly gains. Esp with later competion with K8L, a native 2 socket Quadcore did 2DP flops per cycle/core*8 with 128-bit * 2 SIMD DP in the FPU. Its like Conroe if i remember right on that.. ;)

Not on this topic but I still wonder what change there was from Cell with the DD2 to DD3
revision?
 
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Slight side notes..

iRobot seems interested in using Cell in its products:

http://cio-asia.com/ShowPage.aspx?pagetype=2&articleid=3962&pubid=5&issueid=95

Products such as the Cell processor, developed for Sony’s Playstation 3 video game console, will provide the processing power needed to bring robots to a mass market, said Colin Angle, CEO of iRobot, during an April conference at Boston University. (iRobot makes Roomba, a robot vacuum cleaner, and PackBot, a military robot that disables booby traps and land mines.)

Also, XML parsing on Cell:

http://xtech06.usefulinc.com/schedule/paper/27
 
Nice links.

Reading the cellperformance page, in particular the article on 'fast 4x4 matrix inverse' made me think... Surely sony must provide at least basic maths libraries for running this sort of code in the most optimal way? I'm just hoping that it's simply an example.
 
Dunno. But I do know or think know that lapack/ blas are planned to be ported atleast to the CELL version wich has better DP performance than the current version.
 
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ADEX said:
The RealWorldTech series last year.

If you're talking about the schmoo plot, I've just always defaulted to 1.0v in terms of expectations because it's hard to say what the yields for 0.9v operation at 3.2GHz would be, even though their sample chip in that test could reach it.

0.9v if the final voltage would certainly be good news though.

Not sure but they have a design for a fully pipelined version, it should be quite a bit faster again than Cell+ on DP stuff.

I agree with that, but the Cell+ implementation just seemed so easy, it's like something they could implement within the month if they chose to. If there weren't already so many Cells stockpiled for the PS3 launch, I'd say that they should go Cell+ for all released Cells, and then the fully-pipelined DP version for the truly high-end applications.
 
It seems the Cell section in the IBM Education Assistant was removed. The PDF link in this thread returns an empty document...
 
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