Will there ever be performance monitor build in GFX chips? a

[Idiot]

Ok, so to kristof..

Do you know what kind BIST are built in the Kryos? since it would be next to impossible to debug without those. And what do you see in the future about more BIST functions in the chips?

Also, it would be nice if we could get some performance monitors in the gfx chipsets. With those and proper tools, we no longer have to debate about the pipeline usage efficiency and how much BW is wasted be not allowing smaller chunnks of access, etc.

also we can clearly see what the bottleneck is for a gfx architecture on a given benchmark. So do anyone think those will be added in the future? Or are they already built in today's chipsets just that no one outside R&D gets to access it??

 

[ERP]

The Geforce 3 has a whole host of performance monitors, although I don't know of anywhere they are actually exposed in an API.

Interestingly one of the few things they removed from the NV2A were some of the performance monitors (although they are still pretty extensive), possibly because of the complexities added by the second vertex unit and possibly just to save a few transistors.

I have no idea about other chipsets, but I would imagine that they have similar functionality, it's too useful to the designer not to include.