Nvidia Pascal Speculation Thread

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What do customers have to do with AMD getting priority over the HBM orders in exchange for investing and working on the actual development of the technology?

In the real world? Everything.

If nVidia is scratching their balls while AMD and Hynix are hard at work developing HBM (or just pouring money on Gameworks-infected developer contracts instead), then they can use GDDR5 like they've been using until now. Besides, isn't GDDR5 so much better, according to silent_guy?

Not everything that AMD develops must be for nVidia do use right away. The opposite certainly doesn't happen, does it?

That would be true if companies were school children. Nvidia is a customer of Hynix. HBM is a JEDEC standard. It doesn't really matter if AMD was involved in developing the product.
 
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What evidence do you have that AMD and Hynix are the only ones driving HBM? Other than marketing droids?
You'll have to present proof that someone else is co-developing HBM, because all documentation shown until now clearly says that HBM was developed by Hynix and AMD.

That would be true if companies were school children.
Acting through contractual obligations is something done by school children?
Stop being ridiculous, please.

Nvidia is a customer of Hynix. HBM is a JEDEC standard. It doesn't really matter if AMD was involved in developing the product.

Who else is producing HBM besides Hynix? No one?
Then it doesn't matter how much of a valued customer nVidia is. If AMD gets a contractual temporal priority for the supply of HBM2 chips in exchange for co-developing the tech and is developing a top-to-bottom line-up of GPUs using HBM, then nVidia may be left to dry with no volume for anything other than their top-end solutions.

I'm talking 2016, a time-based priority that would last just enough to keep nVidia from getting HBM2 into the whole Pascal line-up.
 
You'll have to present proof that someone else is co-developing HBM, because all documentation shown until now clearly says that HBM was developed by Hynix and AMD.
Nvidia said they'd be shipping Pascal in 2016 with HBM2. I don't see a reason to doubt this. I do think AMD's PR message that they are some sort of monopsony for HBM because they developed the JEDEC standard is very suspect.

Even if JEDEC standards weren't actually standards, the fact remains that AMD could only have monopsony power over HBM if volumes were extremely restricted - since AMD's market position is so weak. Don't see how this makes sense.

Extraordinary claims require extraordinary evidence.
 
What evidence do you have that AMD and Hynix are the only ones driving HBM? Other than marketing droids?

As far as I know, HBM was accepted by JEDEC as a standard following a joint submission by AMD and SK Hynix, who had developed it. Naturally, now that it's a standard, anyone is free to manufacture it.

Edit: never mind, this post is far too late.
 
Conversely, it would be easy for Nvidia to pressure Hynix into providing them with a low volume part, by threatening to shift high volume parts to a second source.
At least for now, there's no second source for HBM's as far as I know
 
My guess is that Volta was pushed back because of those supposed troublems with HMC.
Pascal was put there as a stop gap to take HBM2 and then with this move they will win some time till next generation with HMC.

The aces are in AMD's hands.
 
Nvidia said they'd be shipping Pascal in 2016 with HBM2. I don't see a reason to doubt this.
Neither do I.
My point was that if AMD gets priority for mass quantities by using HBM on a full line-up of graphics cards, they may successfully block nVidia from doing the same, leaving them with no other choice than to have HBM in only their halo product (let's assume GP100).
And this could have a huge impact in the GPUs for the notebook market, for example.



Nope, agreeing to such an obligation in the first place. What's the upside for Hynix?
HBM was co-developed with AMD. AMD provided human resources, expertize, IP, money, etc.

Not only did Hynix avoid the burden of being the sole company developing the standard, with the participation of AMD they also got to be the very first manufacturer to mass produce the next generation of wide/stacked RAM, get it into a final product on the shelves, get into a JEDEC standard (assuring that other manufacturers adopt the memory, expanding the market worldwide) and they did all of this at least some 10 months before they get any competition from other RAM manufacturers.




Oh and BTW, I must be a wizard:
http://www.tweaktown.com/news/46420/amd-priority-access-hbm2-advantage-over-nvidia/index.html
http://hexus.net/tech/news/graphics/84662-amd-said-secured-priority-access-sk-hynixs-hbm2-chips/

And no, companies are not school children.
 
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You are definitely a wizard at finding "WCCF Tech" references.
 
Have anyone though for a second how developing a new GPU with new type of memory interface even works? Do you really think nVidia or any other company would go through trouble designing new chip without securing steady supply of components? Are they amateurs all of the sudden?
This is not how business works. If AMD has exclusive access to HMB2 for a period of time then nVidia knew about it long before they started working on Pascal and it is taken into account by them. Lets be serious here, they need to secure component supply well in advance, especially if product functionality depends on it so much!
 
Do you really think nVidia or any other company would go through trouble designing new chip without securing steady supply of components? Are they amateurs all of the sudden?
This is not how business works. If AMD has exclusive access to HMB2 for a period of time then nVidia knew about it long before they started working on Pascal and it is taken into account by them.

Again:
- Priority over HBM2 would not mean that nVidia can't use HBM2 at all for Pascal. I sure believe and hope that nVidia will be able to release a Pascal GPU with HBM2.

The difference is that as the proportion of HBM2 production that AMD can secure for their full line-up grows larger, the lesser chances nVidia will have of getting more than a single GPU using HBM2.

So we could have the successors of Fiji, Hawaii, Tonga, Pitcairn and Bonaire all using HBM2, leaving nVidia with not enough HBM2 supply to release more than a single GPU (e.g. GP100) with it. It would mean that the 980/970, 960 and 750 Ti successors (GP104, GP106, GP107) would have to do with GDDR5.
In light of this, it's even possible that except for the GP100, the next generation of nVidia cards might be just a rebrand of Maxwell or little more than a 14/16nm FinFet shrink of the current Maxwell family.



Have anyone though for a second how developing a new GPU with new type of memory interface even works?
(...)
Lets be serious here, they need to secure component supply well in advance, especially if product functionality depends on it so much!
Except that Kaveri and GDDR5M actually happened...
 
HBM was co-developed with AMD. AMD provided human resources, expertize, IP, money, etc.

Yes, so AMD should naturally have an advantage in implementing and using HBM.

Not only did Hynix avoid the burden of being the sole company developing the standard, with the participation of AMD they also got to be the very first manufacturer to mass produce the next generation of wide/stacked RAM, get it into a final product on the shelves, get into a JEDEC standard (assuring that other manufacturers adopt the memory, expanding the market worldwide) and they did all of this at least some 10 months before they get any competition from other RAM manufacturers.

Definitely helpful but not enough to willfully shaft a much larger customer. If nVidia wants HBM they'll get it.


You must be a wizard cause those are magical sources [emoji57]
 
The difference is that as the proportion of HBM2 production that AMD can secure for their full line-up grows larger, the lesser chances nVidia will have of getting more than a single GPU using HBM2.

Let's assume that's not just wishful thinking on your part about how AMD can triumph next generation. Why do you assume nvidia's midrange parts will need HBM to compete?

In light of this, it's even possible that except for the GP100, the next generation of nVidia cards might be just a rebrand of Maxwell or little more than a 14/16nm FinFet shrink of the current Maxwell family.

Wouldn't be that surprising. I fully expect something in the Maxwell family to show up at 16nm. A straight GM204 shrink maybe to replace GM206.
 
Again:
- Priority over HBM2 would not mean that nVidia can't use HBM2 at all for Pascal. I sure believe and hope that nVidia will be able to release a Pascal GPU with HBM2.

The difference is that as the proportion of HBM2 production that AMD can secure for their full line-up grows larger, the lesser chances nVidia will have of getting more than a single GPU using HBM2.

So we could have the successors of Fiji, Hawaii, Tonga, Pitcairn and Bonaire all using HBM2, leaving nVidia with not enough HBM2 supply to release more than a single GPU (e.g. GP100) with it. It would mean that the 980/970, 960 and 750 Ti successors (GP104, GP106, GP107) would have to do with GDDR5.
In light of this, it's even possible that except for the GP100, the next generation of nVidia cards might be just a rebrand of Maxwell or little more than a 14/16nm FinFet shrink of the current Maxwell family.




Except that Kaveri and GDDR5M actually happened...


The issue is would the other cards need HBM 2, are the lower end cards (outside of the enthusiast range) need the extra bandwidth HBM 2 provides? Simple answer to that is probably not.
 
The issue is would the other cards need HBM 2, are the lower end cards (outside of the enthusiast range) need the extra bandwidth HBM 2 provides? Simple answer to that is probably not.


Not forcibly, and the reason why i dont think this will be the case, but if you use some sku for APU's, you dont want forcibly to make them with 2 design. So, and i can imagine an middle end one could be designed for HBM memory bus, and so be used at same time for APU.

The second question is what will be the next low end and middle end based... are we speaking about Fiji " style " in 14/16nm for the middle end, , Hawaii core performance on the low end ? ..

Due to the keep of 28nm, in reality, the evolution have been quite stopped in term of performance for the low end and "low" middle end .. this could well change with a die shrink ..

Its clear that, if the sku is just designed for display on a screen or Home cinema, mini TV box .. no need of HBM ..
 
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If nVidia is scratching their balls ...
Your vocabulary has been sliding into vulgarity lately...

Besides, isn't GDDR5 so much better, according to silent_guy?
See, Totz, that's the kind of remark that makes you lose complete credibility and a reputation of being unable to participate in rational discussion. Because I challenge you to find a single phrase where I'm critical of HBM technology. I've written time and time again that it's great and the technology of the future. But one way or the other, you are unable to separate that concept that other somewhat important factor called price.

Not everything that AMD develops must be for nVidia do use right away. The opposite certainly doesn't happen, does it?
Good thing for Nvidia that it's Hynix who did most of the actual work.
 
...




Except that Kaveri and GDDR5M actually happened...

Yes, but it was completely different to this situation. AMD knew they might not get GDDR5 memories in DIMM form at all and went designing their chip with DDR3 support from the scratch. Besides they reused GDDR 4x64bit memory controller in APU for PS4 so the design was utilized in another product and very similar 4x64bit DDR3 controller has found its way into XBOX ONE APU. Engineering effort didn't go to waste.
With move to HBM you can't do GDDR5 controller and reuse most of it for HBM as they are completely different. nVidia or AMD would have to unnecessary spend silicon area on two separate memory controllers not to mention implications from wiring them up and extra pins this solution would need. Because HBM and GDDR3/5 are so different in silicon implementation, decision about which one you choose has to be made at the design stage. I will be very surprised if we ever see some mid to high end GPU with support for both memory standards. It can happen for smaller bus widths when implementing 64bit DDR3 alongside 1024bit HBM will cost little in die area and complexity but not on flagship GPU.
 
Good thing for Nvidia that it's Hynix who did most of the actual work.
Source? For what I can remember, AMD did a lot of the work, too (though I can't find the article now, I'm quite sure it was detailed somewhere that AMD did this of HBM while SK Hynix did that of HBM - AMD also has long history of developing memory standards, so I wouldn't downplay their part just because the other one is heavy weight memory manufacturer)
 
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