ELSA hints GT206 and GT212
- Thread starter AnarchX
- Start date
Not more than a snowball's chance in hell
I agree. But from the specs it looks like it will be a monster performer. Cant wait to upgrade to that from my dual aging 8800 Ultras
March was the *old* ETA, I think they missed that one already and it's very likely to be outdated info. April, who knows...
I would like that since I think my Ultras have served me well but grown severely long in the tooth and its time I replaced them and laid them to rest.
It looks like GT218 will be Nvidia's first 40nm chip. Probably with 32 SPs, 8 TMUs, 4 ROPs and 64 Bit memory interface.
Source: Hardware-Infos (English)
PS: I hope it is the right thread for that information.
Source: Hardware-Infos (English)
PS: I hope it is the right thread for that information.
Any sources to back that specs up or just speculation? I find these unlikely, since that would mean a physical 4:1 ALU:TEX ratio while G8x/G9x all have 2:1 and G200 has 3:1. Judging from ATI's current lineup, I guess that higher ALU:TEX ratios are desirable in the enthusiast segment, while lower ratios better fit low-end chips. So unless nVidia developed a SIMD block with 16 SPs and 4 ALUs (or 32:8 since G200 has 24:8), which they'd use for every 40nm GT21x chip coming (which might just be the case), I think it's not likely GT218 having those specs.
A 32 SP, 8 TMU 4:1 cluster is what many people including myself expect from GT21x. So these specs make complete sense in that they follow the historical trend of single cluster entry level parts.
Nvidia uses the same 2:1 ratio across all their G9x parts. It's only ATi that switched things up with RV710 in order to get 8 TMUs. A single RV7xx cluster is 80/4 and they wanted 80/8 so had to go with two 40/4 clusters.
Nvidia uses the same 2:1 ratio across all their G9x parts. It's only ATi that switched things up with RV710 in order to get 8 TMUs. A single RV7xx cluster is 80/4 and they wanted 80/8 so had to go with two 40/4 clusters.
ALU:TU ratios are higher than they should be in case of AMD's top range chips. 4:1 ratio through the whole GT21x line is quite possible.
That gives us 384/96 GT212, 256/64 GT214, 192/48 GT216 and 128/32 or 96/24 GT218 (somehow i doubt that one 4:1 TPC GPU is going to be feasable at all on 40nm so this 32/8/4 for GT218 is highly unlikely i guess).
At least 192/48 is right whether it's GT216 or notWrong, wrong and wrong or wrong. IMHO.
As for the GT218 being 32/8/4 -- G98 being 16/8/4 on 65nm has 86mm^2 die size. It would have ~30mm^2 die size on the 40nm. Even if there will be 2 times more ALUs the die size probably won't exceed 50mm^2. And I'm not sure you can have even 64 bit bus on a die this small. Plus i'm hearing that they'll be more aggressive with packing transistors on 40nm. So i'm thinking that the lowest GT21x chip will probably have at least two TPCs.
30mm^2? Well, that sounds to good. :smile:
(45²/65²) * 0,92² = 0,4057
86mm^2 * 0,4057 = 34,89 mm^2
So, that shows a perfect shrink from 65 to 40nm by G98. But do not forget: GT218 will have 4x more SPs and every SP needs more transistors than G9x. Besides GT2xx includes other new features, who uses transistors (I do not mean the DP-ALUs)
I do not know the exactly die size. I estimate 45-65mm^2. I hope this is big enough to use a 64 bit memory interface.
(45²/65²) * 0,92² = 0,4057
86mm^2 * 0,4057 = 34,89 mm^2
So, that shows a perfect shrink from 65 to 40nm by G98. But do not forget: GT218 will have 4x more SPs and every SP needs more transistors than G9x. Besides GT2xx includes other new features, who uses transistors (I do not mean the DP-ALUs
)I do not know the exactly die size. I estimate 45-65mm^2. I hope this is big enough to use a 64 bit memory interface.
Why is that?
And 32 is only 2 times more than 16. 4 times more SPs than G98 gives us 64/16/4 GT218 which i can believe in.
What features could this be?Besides GT2xx includes other new features, who uses transistors (I do not mean the DP-ALUs
G98 has got only 8 SPs. 0.5 shader cluster.
Well, there are many changes like doubling the cache between the streaming multiprocessors, MUL can use for general shading, too, better thread scheduler, more efficent TMUs (93 instead of 76% using theoreticly performance), better blending performance in ROPs, 2D save mode and so and so on...
I thought this was G86?
That's GT200 compared to G92. Who said that GT21x will have the same changes that GT200 had? Who said that GT21x low end will have the same changes as GT200 top-end? Plus -- most of this has nothing to do with ALUs, it's control logic and on-chip memory changes.
Doesn't G98 have 16 SPs just like G86, except 1 SIMD is disabled for 8400GS parts? I haven't seen any references to the contrary.
Why?
