XBOX 360: Inside & Out (NO CPU die photo!)

[Gerry]

Only 500GHz? Bit of a slip-up there, right?

Anyway, if the thing has 10MB of DRAM embedded on the chip, that's at least 80 million transistors, and actually quite a bit more than that as 1kilo in computer-sp33k is 1024, and not 1000...

What's an order of three magnitudes between friends?

Mhz, of course, is what I meant.

 

[Jawed]

I reckon R500 is quite a small shader core, so 150 million transistors sounds reasonable (excluding the EDRAM).

Jawed

 

[tEd]

I reckon R500 is quite a small shader core, so 150 million transistors sounds reasonable (excluding the EDRAM).

Jawed

48 fp32 ALU's with SM3.0+ functionality + 16 texture units. Hello huge. R500 is 300mill trans. at least not including eDRAM

 

[Dave Baumann]

The graphics subsystem is not a single core.

 

[Joe DeFuria]

The graphics subsystem is not a single core.

I take that to mean that there is a TSMC "core" (main GPU) and an NEC (eDRAM) core. How they are "glued" together (one large package? external bus?)...anyone guess?

 

[tEd]

The graphics subsystem is not a single core.

eDRAM modul with part of the z-compare/blending is seperate from the main core as it was hinted before. So 150mil. for the eDRAM module maybe?

 

[Love_In_Rio]

There is no sense in a 150 M transistor chip if for the end of the year R520 and G70 will be plus 300. It is almost twice !. I think web magazines are messing specs

 

[PC-Engine]

The graphics subsystem is not a single core.

I take that to mean that there is a TSMC "core" (main GPU) and an NEC (eDRAM) core. How they are "glued" together (one large package? external bus?)...anyone guess?

MCM?

 

[Jawed]

I reckon R500 is quite a small shader core, so 150 million transistors sounds reasonable (excluding the EDRAM).

Jawed

48 fp32 ALU's with SM3.0+ functionality + 16 texture units. Hello huge. R500 is 300mill trans. at least not including eDRAM

Nope, not huge. R420 is 76 ALUs. Remember, R500 is 8 fragments per clock, peak.

Jawed

 

[pc999]

BTW R500 use virtual memory

Meybe not the best place to ask but

 

[tEd]

I reckon R500 is quite a small shader core, so 150 million transistors sounds reasonable (excluding the EDRAM).

Jawed

48 fp32 ALU's with SM3.0+ functionality + 16 texture units. Hello huge. R500 is 300mill trans. at least not including eDRAM

Nope, not huge. R420 is 76 ALUs. Remember, R500 is 8 fragments per clock, peak.

Jawed

You are counting and comparing with wrong numbers. There are 22 full 4d/5d ALU's + 16 mini ones in r420. r500 has 48 at least 4D ALU's

I know you are counting scalar and vector seperate in r420 but if you would apply that to r500 it would have 96ALU's

 

[Rockster]

How they are "glued" together (one large package? external bus?)...anyone guess?

My guess is some external interface and that's why they only ended up with a 128-bit 22.4GB memory interface rather than the current defacto hi-end 256-bit interface.

 

[Dave Baumann]

(which is exactly how they reach "48B shader ops" - 48 x 2 x 500MHz)

 

[tEd]

(which is exactly how they reach "48B shader ops" - 48 x 2 x 500MHz)

exactly

 

[Dave Baumann]

Of course, each of those units are going to almost certainly be instruction duplicates of each other, which is not the case in any PC graphics.

 

[tEd]

How they are "glued" together (one large package? external bus?)...anyone guess?

My guess is some external interface and that's why they only ended up with a 128-bit 22.4GB memory interface rather than the current defacto hi-end 256-bit interface.

1. The main core and the eDRAM modul would be on the same package

2. I think there is a 256bit external interface running at 350mhz

700mhz ddr as they claim should mean running at 350mhz following the nomenclature usually used with DDR memory. Which means running a 256bit bus at 350mhz = 22.4GB/s

 

[Dave Baumann]

The claims are that the memory is GDDR3, so there would be no point in using GDDR3 if it was 350MHz. A fast 128-bit bus is generally more efficient than a wide slow bus.

 

[Jawed]

I don't think 12 ALU ops (each ALU doing vector + scalar) per clock per fragment is viable.

Register dependencies between lines of code will mean most of your ALUs are sitting around doing nothing most of the time.

Jawed

 

[Megadrive1988]

let me say that I, for one, am mightly fawking confused on this whole 48 shader ALU / pipe thing.

I know for certain that a R300 / Radeon 9700 from mid 2002 has 4 vertex pipes plus 8 pixel pipes. with 1 TMU per pixel pipe.

I know for certain that R350 and R360 (one of these was used in the oldest Xenon dev-kits) has basicly the same configuration as R300.

I know for certain that R420 from mid 2004 has 6 vertex shader pipes plus 16 pixel pipes. the R480 has the same setup.


I know that R500 in Xbox360 has these 48 unified shader pipes but this cannot be compared to the 22 pipes in R420, which kinda makes it seem like R500 has more than double, which it does not really.

how many ALUs make up a conventional pixel pipe and a conventional vertex pipe?

and how on earth could R500 have less transistors than R420 ?
(10 million less) . doesnt make sense.

 

[Titanio]

how many ALUs make up a conventional pixel pipe and a conventional vertex pipe?

I believe the pixel shaders in NVidia's and ATi's latest have 2 ALUs per shader, not sure about the vertex shaders, though. And they may not be very comparable to the ALUs in the R500.