Watch Impress PS3 Technical article, from GDC (some new info)

one said:
That's crazy, as they already said RSX has separate shaders which is it doesn't make sense without PS AND VS.

As I said myself, I know it sounds crazy and prbably is, it is just they they don't seem to mention those Vertex Shaders, as for them being separate, well in a way, even if they only have PS, it is still separate as they can not function as VS. All that is needed is for some dev to call me crazy and that is it:D ...
 
Pure speculation:

24 decoupled TMUs, 20 pixel shaders (1 quad deactivated for yields) and 8 vertex shaders?

It meets all the available information, and it makes some sense.
I guess decoupled TMUs would help with latency issues when accesing XDR via Cell. Well, it would help anyway.

Could it be?

For a technical presentation I was expecting more details on the customizacion of the chip.
 
scificube said:
I wouldn't expect networking would put much of a load on an SPE or most any other CPU. I also thought Cell had built in hardware for real time security and if this is true why is an SPE needed for this? Wouldn't it take some heavy encypt/decrypt in the OS to really bog down an SPE?
As for networking, I think SPE can do background downloading/uploading/streaming/encoding/decoding/P2Ping without slowing down a running game. As for security, I refer to the SPE isolation mode.
http://www-306.ibm.com/chips/techlib/techlib.nsf/techdocs/3F88DA69A1C0AC40872570AB00570985/$file/GSPx_CellSecurityArch.ibm.pdf

DarkRage said:
Pure speculation:

24 decoupled TMUs, 20 pixel shaders (1 quad deactivated for yields) and 8 vertex shaders?

It meets all the available information, and it makes some sense.
Where did you get that yeilds thing? As SCE says 24 I assume 24 are exposed to devs. The transistor count is larger than G70 so I think 24 PS + N deactivated makes more sense if you believe the redundancy.
 
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what does the 24 mean? total pipes? it doesn't list vs and ps seperately does that mean 20 vs and 4 ps? 16 and 8? 12 and 12? 24 and 0? WTF!
 
DarkRage said:
Pure speculation:

24 decoupled TMUs, 20 pixel shaders (1 quad deactivated for yields) and 8 vertex shaders?

It meets all the available information, and it makes some sense.
I guess decoupled TMUs would help with latency issues when accesing XDR via Cell. Well, it would help anyway.

That would make no sense. Textures are getting less necessary. ATI's high end cards use 16.

Nvidia doesn't decouple TMU's either. All information points to very little custom work on RSX.

Therefore, 24 pixel pipes.
 
dukmahsik said:
so does that mean rsx > xenos?

What kinda question is that? You've been hanging around B3D enough to know better..

It's not politically correct to say one is "better" or "worse" LOL.

Honestly, the bandwidth is what I'd be worried about with PS3. On raw strength the RSX is likely at least the equal of Xenos...
 
Good news, now we just have to see what was add'd with those transisters they saved removing all the crap from G70.Flex i/o is the known one but what else? More cache?
 
Xbot360 said:
Honestly, the bandwidth is what I'd be worried about with PS3. On raw strength the RSX is likely at least the equal of Xenos...

Its nothing that worries me but it would have been nice to see EDRAM ala Xenos in it of course.

Otherwise i think as its closed box they will get the most out of it anyway, just harder.
 
Xbot360 said:
Honestly, the bandwidth is what I'd be worried about with PS3. On raw strength the RSX is likely at least the equal of Xenos...

Actually id be more worried about 360's TBH, 22.4gb/s is abit low IMO. Atleat PS3 has a high amount of separate bandwidth for everything, 360's is shared.
 
Platon said:
Has anyone any information on whether the PS3 OS is also using some resources on the PPE as well?.

Yes, the OS uses some main memory and PPU processing resources.
These things are not final, and hopefully the 1 SPU won't be fully reserved the whole time.
 
one said:
FWIW Nishikawa speculates that as it's G70-based (not G71) it doesn't have AA on FP render target.
G71 doesn't have MSAA on FP render targets, either.

Jawed
 
DarkRage said:
Pure speculation:

24 decoupled TMUs, 20 pixel shaders (1 quad deactivated for yields) and 8 vertex shaders?
No, that's such an extremely radical architecture change that you'd no longer be looking at something based upon NV47.

Decoupled TMUs will prolly come with G80 (NV50).

Jawed
 
So is this 100% true?, that Cell only have 6 SPEs now?. Does this mean that Cell is a "downgrade" and is less power than expected?:cry: :cry: :?:
 
PSman said:
So is this 100% true?, that Cell only have 6 SPEs now?. Does this mean that Cell is a "downgrade" and is less power than expected?:cry: :cry: :?:

Uhm not really. Cell still has 7 active SPEs, and Ken Kutaragi said at the last E3 that one of them would be reserved for OS, so it's not less than expected, as we all expected this.
 
PSman its not a downgrade its more of a clarification that 1 of the 7SPE is assigned to run the OS, it was long rumoured that this would be the case. In reality it means that developers have 6 spe to play with.
 
It'd be interesting to see what work the OS takes care of. Reserving 1 SPE for OS doesn't necessarely have to be a bad thing if other processes that are going to be used by games anyway are handled by the OS by default. If they can pack as much functionality into the OS, it could take away some work for developers and give some default functions that practically every game will use because "it's there to be used and on anyway".
 
Well, I don't see why they haven't said 24 pixel shaders, but they've said 24 TMUs. That's the reason I was suggesting decoupled TMUs to deal with increased latencies for data coming from Cell (and XDR). It is a change, but I don't think it is such a massive change, and it could be worthy.

A couple of other points:
- It looks than RSX is making some basic audio stuff, I guess than just basic stuff, like de 360.
- It would be possible than in order to assure BC, 4 MB eDRAM (or some kind of cache) is implemented in RSX. That could justify the 300m transistors figure, give BC (as I don't see in PS3 the bandwith for emulating that) and maybe, just maybe, being used for some effects (I am not talking about a full predicated tiling scheme, but just some space for particle effects, or maybe just for a L2 texture cache).

I don't know. It is like a "Lost" episode. Every slide open more questions and doesn't give any answer.
Pity there is no more memory available. With a 1 year delay, I was hoping an increase in that area.
 
reguarding rsx,

does this give enough information to make more accurate guestimates on render/op throughput, eg, madd rate, filtered/unfiltered/combined texture rate, etc? assuming the pixel shader alu's in the rsx work in a similar fasion to G70?

I don't follow the inner workings too closly, but these specs would (to my maths at least) give a texturing advantage to xenos (when using all the units) and around about even shader performance (given XX% vertex usage)? or am I missing a whole lot? ;-) (I don't want to go making uneducated proclamations here :p)

It's all very facinating really.
 
Graham said:
reguarding rsx,

does this give enough information to make more accurate guestimates on render/op throughput, eg, madd rate, filtered/unfiltered/combined texture rate, etc? assuming the pixel shader alu's in the rsx work in a similar fasion to G70?

I don't follow the inner workings too closly, but these specs would (to my maths at least) give a texturing advantage to xenos (when using all the units) and around about even shader performance (given XX% vertex usage)? or am I missing a whole lot? ;-) (I don't want to go making uneducated proclamations here :p)

It's all very facinating really.

From my understanding even if xenos did use all 48 pipes for shading RSX would still be faster.

48 billion for xenos vs 74.8 billion for RSX.

I could be wrong though
 
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