Why are gpu designers always looking for ways to improve bandwidth efficiency? Presumably you meant more by that than "gpu designers are always looking for ways to make gpus better", something specific to the importance of bw to overall gpu performance. Maybe even something about the general relationship of fillrate improvements vs bandwidth improvements historically?
Maybe it's because both bus and memory technologies are too slow to develop.
I mean, from EDO to GDDR4 the evolution has been pretty slow, when we compare it to the GPU and API tech from each generation.
And since the DRAM market is so volatile, these techniques can prove to be very handy in case of RAM shortages and time to market requirements, at least in the short to medium term business prospects.
A few years ago, when they started R&D for DX9 and beyond, there were no guaranties that GDDR3 or GDDR4 would be cheap enough for consumer high-end and mainstream graphics cards, and here we are today, with the finished (or nearly finished, eh) R6xx and G8x derivatives using it.
It could be a case similar to that of the bean counters at AMD back in 2003 when Intel hit the streets with the DDR2-supporting i915/i925, saying "we will wait for it, DDR2 has yet to prove itself worthy". Indeed, the market entered an unexpectedly slow 2-year transition from DDR-333/400 to DDR2-533/667/800, and that period benefited them greatly in terms of sales, cheaper platform costs due to favorable DDR cost, availability and latency issues next to early DDR2 parts that Intel forced itself into using (hence the long life of i848 and i865).
So, in essence, focus on BW-saving techniques might not be just for design purposes, aiming also for a certain degree of economic future-proofing.