The LAST R600 Rumours & Speculation Thread

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It might, but all I know for sure from that set of facts is it consumes less than 300W at peak. :D I would guess however we now know the origin of the "230W" rumor. ;)

Edit: Rys is the PSU guy, so if he shows up here with popeyes and hysterical laughter, you'll know I've gone beyond my level of expertise again. Having said that. . . the way I think about this area, PSUs, is different than the way I'd think about most digital issues. Most digital issues, you have a very binary answer, and "nearness to boundary" makes no difference. It works or it doesn't work, and that's just all there is to it. PSUs are NOT in that class. PSU ratings for less. . .umm. . .talented? (trying to avoid "honest" here) makers can vary from reality. Environmental conditions (heat, principally) can affect results. Etc. If I'm making a $600 video card, I don't want to be anywhere closely near those boundary margins. Not interested, thank you very much. Now, what does that mean, practically? Well, certainly somewhere above 150W would seem to be indicated. How far above, I dunno. There's also the "new spec" situation to be considered (2.0). . .Consider that the first gen of AGP8X cards made zero difference (I seem to recall) vs 4X. . . but then that has to be balanced against how many people you might take out of the market by switching the spec, which then might work around again to those adapters. . .

EditII: So far as that goes, it's possible there's something about the 8-pin spec they just flat-out like better; gives them engineering warm 'n fuzzies, or what have you. It's obviously a bit different, as it is distributing higher per pin power.
 
geo said:
It might, but all I know for sure from that set of facts is it consumes less than 300W at peak. :D I would guess however we now know the origin of the "230W" rumor. ;)
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True on the later count. As to the former, I understand why it would have an 8-pin connector and not two six pins like 8800gtx if it were 150-225w, as they possibly want to usher in the pci-e 2.0 specs which include the 8-pin plug,but the fact that extra six pin is there (making it comparible to 3x 6-pin plugs, adding 225w to the 75w, instead of 150w) has to make you believe it won't be under 225w...Why else would it be included rather than just the single 8-pin or 2x 6-pin?

Edit: Ok, granted, it could be somewhere to close to 225w to be comfortable considering some PSUs have crap amps (or crap amps per rail), I'll give you that. Still...we're talking AT LEAST somewhere in that vicinity. Even further yet, x1900xtx consumes what...~120-140w (135w as measured by Shammy) depending on which review you look at? That's pretty darn close to the pci-e single 6-pin spec it uses (up to 150w).
 
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turtle - if the 8 pin plug can accept an older 6 pin PCIE plug (if not directly, at least with some kind of converter), then one might be able to use 1 8pin or 2 6pins for r600, obviating the need for a PSU upgrade along with the video card.
 
turtle said:
Edit: Ok, granted, it could be somewhere to close to 225w to be comfortable considering some PSUs have crap amps (or crap amps per rail), I'll give you that. Still...we're talking AT LEAST somewhere in that vicinity. Even further yet, x1900xtx consumes what...~120-140w (135w as measured by Shammy) depending on which review you look at? That's pretty darn close to the pci-e single 6-pin spec it uses (up to 150w).
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And did they have a choice? We're talking about a new spec here. Not AMD's spec, nor NV's spec (tho obviously they would have had major input --there's been evidence of that going back to the spring of '06). When would the PSUs meeting the spec been available?
 
psurge said:
turtle - if the 8 pin plug can accept an older 6 pin PCIE plug (if not directly, at least with some kind of converter), then one might be able to use 1 8pin or 2 6pins for r600, obviating the need for a PSU upgrade along with the video card.
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Yeah, this is exactly what I said earlier in the the thread.

People with existing high-end PSUs will be able to run a single R600 because 2xPEG1+mobo = 225W maximum, provided that an adaptor can convert one of the PEG1 plugs into PEG2 (6 pin -> 8 pin).

If this isn't the case, then AMD is expecting everyone to buy a new PSU, because very few PSUs provide more than 2 PEG1 plugs (you'd need 3 to supply the juice for >225W). AMD would be, in effect, saying that only people with quad-SLI capable PSUs would be able to run a single R600. I think that's nonsense.

If you look at the second photo on this page:

http://www.anandtech.com/tradeshows/showdoc.aspx?i=2905&p=2

you can see that the PEG2 plug comes in two parts, 6 pins + 2 pins. Notice the other end of the cable is two cables, each of which ends in a 6-pin plug? Those 6 pin plugs are part of the modular PSU design, where the back of the PSU has sockets for the user to choose which cabling they want. It takes two separate 12V rails and combines them into one PEG2 plug.

So to run a CrossFire R600 system takes one PEG2 plug per card.

If, as some people are suggesting, R600 requires >225W (75W mobo + 150W PEG2 + 75W PEG1), a CrossFire system would be 600W total rated, 450W rated from the PEG cables. That would be more than the 850W power supply can deliver, because it is only rated for 408W on its PEG cables (12V x 34A), if the existing 850W PSU is any guide:

http://www.enermax.com.tw/english/upload/document/M200671214475627129.pdf

So, it doesn't add up. It looks, to me, like R600 is rated as a maximum of 225W, which is 2xPEG1 or 1xPEG2.

Jawed
 
One thing that's bothering me is the 65nm shrink of R600. How does the 512-bit bus fit onto a die that's 66% of the area of the 80nm die (i.e. about 287mm2)?

Are we looking at a situation like R520->R580, where the transistor count grew by ~20%? But this time, there's a process change as well?

The problem being, that the transistor count would need to grow by ~50% for a 65nm R650, with the same die size. That would put R650 at well over 1 billion transistors.

Is there a middle ground? Perhaps, to fit in the 512-bit bus, only requires a ~25% die increase whilst transitioning from 80nm to 65nm?

Alternatively, R600 is 65nm. Then, would R650 be 55nm? 55nm would require ~35% more transistors for the same die size though.

Sigh.

Jawed
 
Maybe that explains Orton's comments about next gen having 96 shaders, and also having a 1B transistor design in-house?
 
75+75 for the extra connectors and 75 for the PCI-e bus ;)

so for the g80 max of 225 watts

150+75+75 for the r600 max of 300 watts
 
TG01 said:
Why is that so..? Isn't the 512 bit bus made out of the same 65nm technology as the rest of the chip..?
Wouldn't it just shrink along with the rest of chip..?
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need space for the amount of pins attached to the chip :smile:
 
TG01 said:
Why is that so..? Isn't the 512 bit bus made out of the same 65nm technology as the rest of the chip..?
Wouldn't it just shrink along with the rest of chip..?
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The entire bottom surface of the chip is covered in a grid of pads that connect the chip to the outside world: power + PCI Express bus + memory bus + bus to video-in/out. The memory bus is the most complex of the buses, consuming by far the most pads. There's 2140 pins on the package that houses R600, apparently (hoping I've remembered the count properly - pins or balls? not too sure?). I don't know how many pads are required to support that number of pins, either. I'm not 100% convinced there's a 1:1 mapping pads:pins.

There are limits on how closely spaced the pads on the surface of the chip can be. Trouble is, there's no decent explanation for how densely these pads can be squeezed in.

Whatever the limit is, it's worth pondering, how would a 65nm variant of R600 (R650?) solve the density problem, bearing in mind that a "functionally equal" die would be 66% of the size. That's assuming that R600 is 80nm and R650 is 65nm.

For all we know, R600 could be 66% of its current size and still support a 512-bit bus. It's a great unknown, and I think rather important if we're going to speculate upon processes and the future for R600 and its value and mainstream children.

Jawed
 
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turtle said:
Alright then. So if that's that, R600 consumes >225w. Agreed? If it were less than that, one 8-pin or two 6-pin (or like 8800gtx) would be sufficient, as either would add 150w to the card plus the 75w from the slot. While actual exact power consumption of either card you can argue with me about, just like if a G80 were built to consume at max 150w, it would only have one 6-pin connector (75+75). Since it has two, we assume >150w, <225w, which is true (total power under load is between those numbers). Is it not safe to assume then that R600 is >225w, < 300w from the 8-pin (150w), 6-pin (75w) and board (75w)?

No, I'm not talking total system consumption. ;)
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Nope, you cannot say that every connector output will be maxed outby R600.
I.e. in the first 6800 boards testing at xbitlabs was found that power draw come out essentially from auxiliary connectors, and not from the AGP connector. So we can't assume on R600 that the PCI-Express solot output will be really used at max (or even very little). And you need also to add a security factor, and there could be many other technical reasons that could explain this PEG+PEG2 setup.
 
Geeforcer said:
Right before a new DirectX revision, a company released an surpiursing, out of nowhere GPU that almost no one saw coming. They stuck with a tried-and-true process, but still managed to put out a huge chip running at very competetive clockspeeds. Their competitor, on the other hand, decided that they needed a new process for their chip, that had around 20 million more transistors. Yet, their design was months late, used exotic, never-before-seen cooling while running at previously unheard of speeds.
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That sounds amazingly simular to the R300 vrs NV30 days :) Amazing how times have seen to swtich the players around..
 
Jawed said:
I don't know how many pads are required to support that number of pins, either. I'm not 100% convinced there's a 1:1 mapping pads : pins.
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There isn't.
For functional pins, it's usually the case for the high performance products, but for lower performing ones, it's common to connect, e.g., only 1 MC instead of 2.

For power pads, there is no relation at all. Power pads on a chip and balls on a package have different maximum current ratings, so that (among other things) determines their numbers. In the non-flip chip days, it was very common to bond 1 power pin to multiple power pads.
For flip chip, the die is sitting on a multilayer substrate (the number of layers can go very high, 8 or more) and one tries to connect as much power/gnd balls as possible.

The rule of thumb used to be that 1 power pad has a current limit of 100 mA (this may have changed over the years though). If the chip core consumes 100W and has a voltage of 1.1V, then that's 100W/1.1V x 1000/100 x 2 (vdd+gnd) = 1800 pads right there, or a grid of 42x42. In reality, the amount of power pads will be much higher because some sections of the chips consume more than others and because margin is never a bad thing to have and cheap in this case.

And that's not counting the power pads for the IO, of course.
 
Jawed said:
One thing that's bothering me is the 65nm shrink of R600. How does the 512-bit bus fit onto a die that's 66% of the area of the 80nm die (i.e. about 287mm2)?

Are we looking at a situation like R520->R580, where the transistor count grew by ~20%? But this time, there's a process change as well?

The problem being, that the transistor count would need to grow by ~50% for a 65nm R650, with the same die size. That would put R650 at well over 1 billion transistors.
Click to expand...

To me it still looks like they started with 65nm to begin with. They didn't use the shrink to make the die smaller they used it to make one massive chip the competition couldn't possibly match. If the die shot that was shown was 65nm and had ~1billion transistors it would explain what requires all of the bandwidth 512b provides. A 65nm chip would also go along way towards explaining some of these higher clocks we've been seeing rumors on. Also, why ATI doesn't seem rushed to get the part out and Orton's comments might have not been as far looking as we thought.

R650 could just be a more advanced 65nm process for lower power along with some silicon revisions, or was geared solely towards being a stream processor. Heck at $2600 a pop AMD's gotta love selling those SPs.
 
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