Qualcomm's dual core up to 1,2GHz

[Wishmaster]

The HTC Vision (also Adreno205) scores slightly better than the desire. Considering it's the same 800*480 resolution as the Galaxy S smart-phones, it's at 1424 frames vs. highest Galaxy S being now at 1918 frames. Albeit I'd expect for both sides performance to slightly scale due to sw optimisations, I wouldn't suggest that that gap might close. So judging from one public synthetic benchmark it's in reality somewhere in between a SGX535 and a 540, under the presupposition that the 535 isn't clocked higher than 250MHz.

This could be either due to running sense UI or simple software difference, irrelevant.
What is for sure that adreno 205 may not be the best GPU available for smartphones, but this benchmark proves that msm8255 gets twice as high scores as qsd8250 running the same OS, and is slightly faster than iphone 4, ipad and iphone 3GS.
Not bad I would say. Hopefully adreno 220 will be as good as the specs say.

 

[Ailuros]

This could be either due to running sense UI or simple software difference, irrelevant.
What is for sure that adreno 205 may not be the best GPU available for smartphones, but this benchmark proves that msm8255 gets twice as high scores as qsd8250 running the same OS, and is slightly faster than iphone 4, ipad and iphone 3GS.
Not bad I would say. Hopefully adreno 220 will be as good as the specs say.

It doesn't prove that much either since it's still one singled out synthetic benchmark. Since there are quite a few real time videos on the internet illustrating gaming performance in real time and considering how the original Adreno did in those, I'm looking forward to see if 205 or future iterations respectively can get those out of the endless stutter-fest they're currently in. And we're not even talking about demanding applications but something as antique and boring as Quake2.

A wee bit more advanced would be Kwaak3: http://www.anandtech.com/show/3891/samsung-epic-4g-review-the-fastest-android-phone/5

A single TMU 530 is twice as fast as Adreno Prime.

 

[Arun]

So even the MSM8x60 uses the 14.4Mbps baseband? Quite interesting - so that's how they boosted their specs while maintaining a reasonable die size. I guess 2011 really will be the year of 14.4 for phones - even the ST-Ericsson U8500 (baseband designed by Nokia) is 14.4! I also wonder whether that 3D core is 2 TMU at 266MHz or 4 TMU at 133MHz. I'd rather bet on the former but who knows.

 

[Laurent06]

What do they call "Scorpion asynchronous dual-CPU cores"?

 

[Arun]

What do they call "Scorpion asynchronous dual-CPU cores"?

Probably that the two cores can be clocked independently (and in the QDD8672's case at least but maybe also the other, have independent voltages, which is very cool although a bit expensive).

 

[Wishmaster]

Probably that the two cores can be clocked independently (and in the QDD8672's case at least but maybe also the other, have independent voltages, which is very cool although a bit expensive).

Wasn't that about independent and dynamic core scaling?
When needed both are running at full speed, when on standby clocked very low and when needed only for low priority task one is turned of and second is running at adequate speed?

 

[Ailuros]

Why do I have the feeling that you're both saying the same thing?

 

[Wishmaster]

Why do I have the feeling that you're both saying the same thing?

If so, it means I have to educate more and stop making fool of myself

 

[Ailuros]

If so, it means I have to educate more and stop making fool of myself

I'm hardly fit to educate anyone when it comes to technical matters. I just couldn't help it. If you re-read both yours and Arun's post it's not to hard to see that you both mean the same thing.

 

[Wishmaster]

I'm hardly fit to educate anyone when it comes to technical matters. I just couldn't help it. If you re-read both yours and Arun's post it's not to hard to see that you both mean the same thing.

You're right. I responded too fast without thinking it through
But getting back to the topic.
I hope they improved the drivers for adreno 205, compared to not perfect amd z430 drivers. They finally changed amd branding to adreno so hopefully it means that they really improved it not only by doubling the clock or TMU but by software optimizations.

 

[Arun]

Wasn't that about independent and dynamic core scaling?
When needed both are running at full speed, when on standby clocked very low and when needed only for low priority task one is turned of and second is running at adequate speed?

It's practically the same thing, but to be honest I was nitpicking and assumed nobody would notice...

The way this stuff works (afaik) is that the individual chips are tested/qualified at various sets of frequencies and voltages. There's no way to know *exactly* what voltage is required at an arbitrary frequency.

So you know (to pick random numbers) that you can run the CPU at 800MHz at 1.0v and 550MHz at 0.9v. But you have no way to reliably know whether you could run at 700MHZ at 0.97v for example - you're forced to run it at 1.0v anyway. So it is conceivable *in theory* in a dual-core system that both cores share the same 1.0v voltage (whether they have independent regulators or not) but are clocked at slightly different frequencies.

In practice, I don't know if they bother doing that kind of thing. Power gating has become so aggressive on these chips it might be better to always run at the maximum frequency for the rated voltage and power gate a bit more frequently. In fact it would probably be preferable in terms of power consumption unless you're limited by the voltage floor of the process (i.e. minimum voltage the chip can run at without problems). You might be able to clock at 150MHz at that voltage but only need the CPU for basic bookkeeping at 25MHz for a small number of cycles - there's still a latency for power gating so you might actually save power by doing that.

However there's absolutely no point in running two cores below their rated frequency at the voltage floor - that's downright absurd. So it's very possible (and in fact rather likely) that my nitpicking only made theoretical sense - in the real world, there's probably very little and possibly no difference.

Aren't you happy having read all this text just to know that?

 

[Laurent06]

This raises the question of whether there's any L1D coherency between the cores (which was more what I was wondering).

 

[Wishmaster]

Aren't you happy having read all this text just to know that?

You just made my day

 

[metafor]

However there's absolutely no point in running two cores below their rated frequency at the voltage floor - that's downright absurd.

Sure there is. The voltage floor may be 0.75V but if you can still run at, say 400MHz, you'd save a significant amount of power running at 100MHz. Power gating isn't trivial. States have to be saved off or the sub-block has to be treated like it's a cold boot. And even then you have to wait for the pipeline to finish its last instruction before powering off.

If the occasional instruction will come along but not require much speed, or a thread is running that does not require much performance at all, running at 100MHz is very advantageous vs 400MHz even at the same voltage.

 

[Arun]

Sure there is. The voltage floor may be 0.75V but if you can still run at, say 400MHz, you'd save a significant amount of power running at 100MHz. Power gating isn't trivial. States have to be saved off or the sub-block has to be treated like it's a cold boot. And even then you have to wait for the pipeline to finish its last instruction before powering off.

If the occasional instruction will come along but not require much speed, or a thread is running that does not require much performance at all, running at 100MHz is very advantageous vs 400MHz even at the same voltage.

Gah, I knew I should have phrased that part better. Needless to say, I agree completely (although I'd be expect the voltage floor frequency to be slightly lower than 400MHz even on a 1.5GHz chip, but I don't really know so let's assume so - I'd be very curious about more reliable ballpark numbers).

What I meant is that if your speed at the voltage floor is 400MHz and you've got a dual-threaded workload that only requires two cores running at 100MHz, it makes no sense to use both cores: it's more efficient to use a single core at ~200MHz to reduce leakage. However it does make very good sense to run one core at exactly 400MHz and the other at <400MHz to save some power, so that's a common case where separate clocking is beneficial even with the same voltage regulator. But on the other hand I wouldn't be very impressed by a handheld SMP implementation that ever activates the second core before the first core is maxed out at its voltage floor.

 

[metafor]

Gah, I knew I should have phrased that part better. Needless to say, I agree completely (although I'd be expect the voltage floor frequency to be slightly lower than 400MHz even on a 1.5GHz chip, but I don't really know so let's assume so - I'd be very curious about more reliable ballpark numbers).

For a 1.5GHz chip, it's about realistic at 45LP. Assuming 1.5 was your peak at say ~1.0V. It varies wildly of course when moving from 65LP or to 28LP. I was just throwing out a number

What I meant is that if your speed at the voltage floor is 400MHz and you've got a dual-threaded workload that only requires two cores running at 100MHz, it makes no sense to use both cores: it's more efficient to use a single core at ~200MHz to reduce leakage. However it does make very good sense to run one core at exactly 400MHz and the other at <400MHz to save some power, so that's a common case where separate clocking is beneficial even with the same voltage regulator. But on the other hand I wouldn't be very impressed by a handheld SMP implementation that ever activates the second core before the first core is maxed out at its voltage floor.

I agree. I'm not sure how current handheld OS's handle this. I would suspect that if there are 2 threads, they'd blindly schedule it for 2 cores. But I don't think the typical smartphone or even tablet workload involves a lot of light, sustained processes. It's usually burst work like rendering a webpage as fast as possible or responding to a GUI action.

I don't think any dual-core implementation out there requires the two cores to always run at the same speed (modern dual-core implementation anyway).