I know that there is only speculation right now, over the upcoming architectures, but can someone please explain to me a few things.
First, my understanding of a traditional pipeline is like this, you have a vertex unit, a tmu, an alu for pixel shading, and a ROP (this correct?) I understand the rop must be last for output but does the order of the others matter? If this is incorrect can someone explain the set up of a traditional pipeline to me?
Second, in a unified architecture how is this changed? You have a general purpose shader, a tmu, and a rop. How does order work with this? Does GS->VS->PS have to be executed in that order since GS is a bunch of triangles, vs is one triangle, and ps is just a pixel of a triangle? Does a PS have to wait for the results of a GS before execution etc?
Also, this is why its expected that nvidia has only unified GS/VS because then it just looks like GS/VS, tmu, PS, ROP, which is much more conventional, correct?
Also, just to clear up a bit, a 16-1-3-1 part is 16vertex shaders, 1 tmu, 3 alu, and 1 rop? wouldnt a better way of saying this be 4*(4-1-3-1) or 16 + 4(1-3-1). Vertex can output to any shader unit correct?
Finally, with Xenos or with R600 is it the scheduler able to dynamically set the shaders to do anything on the fly, for example 3gs, 5Vs, and say 16 ps (random numbers) or must an entire array be set to perform one type of shader?
Sorry for all of the questions. I have read a good amount about architectures, but im just an interested enthusiast so some things are unclear.
First, my understanding of a traditional pipeline is like this, you have a vertex unit, a tmu, an alu for pixel shading, and a ROP (this correct?) I understand the rop must be last for output but does the order of the others matter? If this is incorrect can someone explain the set up of a traditional pipeline to me?
Second, in a unified architecture how is this changed? You have a general purpose shader, a tmu, and a rop. How does order work with this? Does GS->VS->PS have to be executed in that order since GS is a bunch of triangles, vs is one triangle, and ps is just a pixel of a triangle? Does a PS have to wait for the results of a GS before execution etc?
Also, this is why its expected that nvidia has only unified GS/VS because then it just looks like GS/VS, tmu, PS, ROP, which is much more conventional, correct?
Also, just to clear up a bit, a 16-1-3-1 part is 16vertex shaders, 1 tmu, 3 alu, and 1 rop? wouldnt a better way of saying this be 4*(4-1-3-1) or 16 + 4(1-3-1). Vertex can output to any shader unit correct?
Finally, with Xenos or with R600 is it the scheduler able to dynamically set the shaders to do anything on the fly, for example 3gs, 5Vs, and say 16 ps (random numbers) or must an entire array be set to perform one type of shader?
Sorry for all of the questions. I have read a good amount about architectures, but im just an interested enthusiast so some things are unclear.