nondescript
Regular
This might be beating a dead horse, but, I thought at least a few people would be interested in this.
http://www.eetimes.com/semi/news/OEG20040220S0025
To summarize:
- CMOS5 (65nm) development will be completed by March 31st.
- Volume Fabrication of CMOS5 in early 2005
- CMOS6 (45nm) development targeted for completion at end of 2005.
(*Waiting for the obligatory "well what about PSX2OAC blah blah..."*)
[Edit: completing => completion. Typo on my part. Apologies everyone]
http://www.eetimes.com/semi/news/OEG20040220S0025
Toshiba ready for 65 nm fabrication in first half 2005
By Yoshiko Hara
EE Times
February 20, 2004 (10:23 a.m. ET)
TOKYO — Toshiba Corp. has completed its 300mm wafer fab in Oita, Kyushu, and intends to lead the industry with fabrication of chips on a 65 nm process line in the first half of next year.
The 65-nm process will be for volume production. Part of the new fab's capacity will be allocated to the virtual joint venture fab with Sony Corp. Toshiba and Sony respectively invested 42 billion yen (about $389 million) for the virtual fab.
Toshiba and Sony have been jointly developing process technology, starting with the CMOS4 90 nm node. The CMOS5 65 nm node development is scheduled to end by the end of this fiscal year (March 31).
The virtual fab arrangement is the same as the current for fabricating the Emotion Engine for PlayStation2. That joint venture, Oita TS Semiconductor, between Toshiba and Sony is a virtual fab that utilizes Toshiba's 200 mm Oita fab facility.
Early this month, Toshiba and Sony had agreed to extend their process development collaboration to the CMOS6 45 nm node, which will begin immediately after CMOS5 development is completed next month. CMOS6 development is being targeted for completion by the end of 2005 and will also use the new 300-mm facility, a Toshiba spokesman said.
Toshiba's process migration started with volume production using its 90 nm process named CMOS4 this fall followed by fabrication using the 65 nm CMOS5 process next year.
Overall during five years Toshiba will have invested a total of 200 billion yen (about $1.9 billion) into the new 300mm wafer fab. Its pojected capacity is expected to be 12,500 wafers a month in 2007.
To summarize:
- CMOS5 (65nm) development will be completed by March 31st.
- Volume Fabrication of CMOS5 in early 2005
- CMOS6 (45nm) development targeted for completion at end of 2005.
(*Waiting for the obligatory "well what about PSX2OAC blah blah..."*)
[Edit: completing => completion. Typo on my part. Apologies everyone]