Nvidia Pascal Speculation Thread

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I haven't been following this thread closely (or Pascal for that matter), but has this rumor been posted? How reasonable does it seem?

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512bit GDDR5 memory controller and HBM2?
Doesn't sound like the best way to take advantage of die area.
 
The smoking gun about this being fake are the number of units (too high to fit) and the base clock speed (there's no way they won't make use of the process being faster.)
 
Different number of rops for gp100 (fermi was the last time that happened?), clocks have barely been bumped, GDDR5 + HBM2? Not the most convincing fake I've seen.
 
They could theoretically be covering their bases incase they have serious issues with HBM. Also, Nvidia has some history of clock speed regression on a new node (40nm I think, maybe some earlier ones as well) and let's not forget that Maxwell's clock speed uplift came after two years on the 28nm process. There is no guarantee that those will follow over to early 16FF+ so perhaps 28nm Kepler chips like the 780 would be a more accurate comparison.

I do believe GP104 will have a 384-bit bus as well and I don't recall seeing that rumour elsewhere.

With all that said, I don't believe any of it either.
 
There's also an upcoming GP102 in the Pascal lineup. I don't think there's enough room between the abovementioned GP104 and GP100 for a GP102 to really fit. I could almost believe that the "X80 Ti" is GP102 (could explain the GDDR5), but the SP counts are too close to each other.
 
They could theoretically be covering their bases incase they have serious issues with HBM. Also, Nvidia has some history of clock speed regression on a new node (40nm I think, maybe some earlier ones as well) and let's not forget that Maxwell's clock speed uplift came after two years on the 28nm process.
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Dont it was due to double clock core speed mainly ?
 
BTW with HBMv2 modules being much bigger than HBMv1 ones, can we put a big 500sq mm die on a interposer?

Fury is 596mm2 ( taken on Anandtech review )... But at least at 28nm, both nvidia and AMD have hit the reticule limit of TSMC.. I dont know what is the limit on 14-16nm. ( But will they really want to hit the bigger sized chip on the first series of this new process ? ... I dont think... )

Im not sure the interposer size is a limiter factor there.
 
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Reticle size should stay the same for all intends and purposes. But I haven't read anywhere, why HBM2 should be significantly bigger, quite the contrary, they're within the same JEDEC spec, not even officially named HBM2.
 
There's still a gaping hole in price and performance between the 960 and 970 in nVidia's lineup. I imagine the first pascal rollout will fill that gap or we'll see another cut down gm204 part very soon.
 
There's still a gaping hole in price and performance between the 960 and 970 in nVidia's lineup. I imagine the first pascal rollout will fill that gap or we'll see another cut down gm204 part very soon.

I used to wonder the same thing. But now that I think about it, AMD also has a health gap between the 390 and 380X.

Both the 970 and the 390 can be had for as little as $300. The 960 is a bargain at as low as $170 and the cheapest 380X is currently going for just under $200 (and before that came out, the 380 was the next best thing and it's only $170-180). There's definitely a noticeable gap, as you mentioned.

I'm thinking that both Nvidia and AMD figure that anyone spending around $200-$300 will want to "buy-up" to a $300 GPU to ensure that their GPU is officially ready for VR (the VR min spec is 970 or 290). VR is getting pretty hyped at the moment.

Alternatively, another possibility is that both AMD and Nvidia know that it's in their best interest to get as many people to have VR-qualified machines so those consumers can get VR headsets. Granted, not every GPU owner would purchase a VR headset endorsed by their respective GPU manufacturer, but they would still get a healthy chunk.

Either way, considering both AMD and Nvidia have this peculiar gap in their lineup, I bet there's some reason for it.
 
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