Nvidia GT300 core: Speculation

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It's just there so they can go closer to the edge as far as signal integrity is concerned.
Well, except that any sort of error-correcting method is likely to cause at least some performance impact. So it seems more likely they'd get more performance (for the same cost) by going with somewhat lower, more reliable speeds and not having the added overhead of error correction.
 
Well, except that any sort of error-correcting method is likely to cause at least some performance impact. So it seems more likely they'd get more performance (for the same cost) by going with somewhat lower, more reliable speeds and not having the added overhead of error correction.

only impact any EDC scheme has is any overhead it requires on the interface such as either extra transmissions or pins that could of been used to increase bandwidth.
 
only impact any EDC scheme has is any overhead it requires on the interface such as either extra transmissions or pins that could of been used to increase bandwidth.
Well, if we're talking about pushing things to the absolute limits of signal integrity, then those should be rather significant, unless the error detection scheme really has a minuscule overhead.
 
While there are a small number of hamming codes that correspond mathematically with some CRC codes, I'm not sure that such a code was used.
I'm sure HEC is what they used ... see "A fast GDDR5 read CRC calculation circuit with read DBI operation". That said, they probably don't even use the error correction potential at the moment ... easier to just resend the data.
 
http://www.digitimes.com/news/a20090901PD204.html

Nvidia is scheduled to complete engineering samples of its DirectX 11-based GT300 GPU at the end of September in order to start shipping in December at the earliest, the sources noted.

Hopefully they talk about CUDA 3.0 and any new capabilities that brings with it. That will tell us a lot more about the architecture than any lamo demos.
 
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I wonder when someone will start suggesting, GT300 will not be a unified shader architecture any more and that DX11 is only bolted on in the cheapest possible way.


WRT & BTW: Does Nvidia own Transmetas codemorphing patents and stuff?
 
Nvidia roadmaps turn up

http://www.semiaccurate.com/2009/09/01/nvidia-roadmaps-turn/

Easier to post the pic than try to sum it up in words:

NV_quarter_roadmap.jpg


The most interesting item is D12U or GT300. The U stands for Ultra, the highest end variant. Nvidia is claiming that will be out in Q1, but that forecast is really dependent on what it gets back from the fab later this week or early next. If its hot lots need a respin, this Q1/10 date is suddenly going to seem hopelessly optimistic.

On the original roadmaps shown to SemiAccurate, all of the lower 2 classes had the D10 to D11 transition happening on the Q4 to Q1 boundary, that is, January 1. The Enthusiast segment has the D10U to D12U transition happening after that - the bar of the graph clearly goes well into Q1. This is either fudging or a CES paper launch, followed by availability sometime later.

There's a second picture which fleshes things out. Except it looks horribly confused, naming GTX280 (not GTX285) and assigning it 1792MB of memory.

Jawed
 
Well, except that any sort of error-correcting method is likely to cause at least some performance impact. So it seems more likely they'd get more performance (for the same cost) by going with somewhat lower, more reliable speeds and not having the added overhead of error correction.

It may seem counterintuitive, but for any given communications channel (bandwidth and signal-to-noise ratio), the only way to approach the theoretical information carrying limit (the Shannon limit) for that channel is to employ sophisticated forward error correction. The only reason not to do so is for reasons of hardware simplicity (and cost). QPI, HyperTransport, PCIe (IIRC) all use some form of error detection and/or correction to obtain the highest speeds.
 
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