Nvidia GT300 core: Speculation

Codename is Fermi.
http://www.extrahardware.cz/next-gen-gpu-nvidia-vyvijena-jako-fermi
(google translate, CZ -> EN)

 

From Tesla to Fermi. GT200 to GF300, eh?

Jawed

 

Aye, Fermi might just be the next iteration of their computing platform (i.e. the replacement for Tesla), not the GPU itself.

 

Why change the brand? Isn't Tesla the counterpart to Geforce and Quadro?

 

No, G80 to "GT300"...

 

Might just be a codename that will launch as Tesla 2 or somesuch.

 

http://en.wikipedia.org/wiki/Fermi_paradox

 

Hahahaha, now that's funny.

 

As long as it is an internal codename is fine, but I really do hope they are not going to attach the name of Enrico Fermi to their products.

 

"tape out" can mean one of two things depending on your viewpoint and where you are.

1) sending off of the design to be fabricated
2) sending of design from fracture to actual mask production.

In the modern semi industry these are generally the steps from design completion to actual wafer processing:

A) Final design rule checks

B) Tape In (though some can refer to it as tape out)- Sending of first layer to "fracture". Fracture is basically the computational process by which a layer of the CAD based "mask set" is computationally modified to fit within the optical realities of modern day lithography. This includes OPC, etc. Can be fairly time consuming. Most semiconductor manufactures tend to have a fairly large computational pool. These systems are in the range of the Top500 supercomputer lists - ie large.

C) Tape Out - end result of "fracture" of mask layer sent to mask manufacturing facility. Most large semi companies have their own internal mask facilities, smaller ones may farm this out.

D) first lithography layer in process.

So someone can refer to "tape out" as either tape-in or as the actual tape-out. Originally when all these chips were layed out on effectively plastic/mylar sheeting with actual tape, tape-out refered to the point as which the last piece of tape was applied and the whole thing was taken to be photographically shrunk onto the mask sets.

 

Having only worked for fabless companies, tape-out has always meant step 1). It's where the ops guys take over from the designers and it's definitely the most important milestone to look forward too, because it usually means an abrupt end to months of long work weeks.
The difference between 1) and 2) is only a couple of days right? So it doesn't really make that much of a difference in the grant scheme of things.

 

A while back there was a presentation that mentioned OPC being accelerated with CUDA:

http://forum.beyond3d.com/showpost.php?p=1267230&postcount=18

No idea whether it's live though.

Jawed

 

Varies from manufacturer to manufacturer.

 

Not sure I'd want to rely on a multi-million dollar maskset that is going to be used to do a multi-million dollar fab run that is going to cost multiple millions to do initial bring up on being generated on hardware that doesn't have error detection... But that's just me.

 

Who says they don't have error detection?

 

3-way vote should do the trick, shouldn't it?

Jawed

 

Um, cause if they did they would document it? Memory run at the edge of SI without ECC?

 

ECC is not the only possible form of error correction. Jawed makes a nice point above.

 

3x vote significantly decreases the performance, and I've fairly skeptical of Nvidia's performance claims in the first place since their time estimate is off...

 

And if you've got much more than a 3x performance improvement by using the GPU's, it's not a problem, is it?