Multiple R300

Three DVI-I outputs per chassis in the quad-chip configuration for cost-effective three-channel, low-end image generator applications

:eek:

with 2-to-24-sample full-scene antialiasing at screen resolutions up to 2048x1536 and fill rates up to 9.6Gpix/sec

:eek:
 
sireric said:
It's actually in its own box. Not too big though.

Very nice.

I figured as much - it sounded like this would be similar to the system Quantum3D offer. Do you know if they were interested at all, or are they locked in to NVIDIA?
 
I couldn't comment on any un-announced product that I would know of, by any company, sorry.

Though this E&S product is pretty sweet. Nearly 10GPixels/second fill rate is nice (4 chips in this design). Very nice. Actually, this might be a first on earth, no? IR3 couldn't do this, and I can't remember the pixel planes' fill rate.

I wonder if they will ever do a version with more chips. No technical reasons to prevent it (that I know of) from an R300 standpoint.
 
I have yet to read what's in the link in the original post, but, as you must know, the R300 is capable of scaling to 256 VPUs according to ATI :eek: :eek:


even just 4 R300 VPUs though, that would be SENSATIONAL if a sold as a PC card for under $1000.....
 
imagine what a single box configured with say, 32 R300 VPUs could do. a muni rendering farm. with upgrade paths to using R350s, R400s, etc.
 
you know... the consumer single chip versions of R400 and NV40 will most likely not surpass or even equal this performance. nearly 10Gpixels. certainly the XBox 2 and PS3 will, though.
 
sireric said:
Though this E&S product is pretty sweet. Nearly 10GPixels/second fill rate is nice (4 chips in this design). Very nice. Actually, this might be a first on earth, no? IR3 couldn't do this, and I can't remember the pixel planes' fill rate.

Quantum3D did do a 32-chip VSA-100 which DID run at 10Gp/s.

One side note, though, those multi-R300's seem to have a shared 256-bit memory bus (i.e. same bandwidth as a single 9700 Pro)... whereas AAlchemy subsystems have the full 128-bit per core... so the top 32-chip variant features an unsurpassed 85GB/sec combined. :)

And even if they didn't run a 32-chip model, that still leaves them with 42.25GB/sec.

AND the 16+ chip AAlchemy driver actually supports 16x 3dfx jittered scattered (er... I think that's what it's called... where there is one sample per row and column)-grid AA.
 
Hmm .. sharing a single 256-bit bus between multiple R300 chips sounds extraordinarily expensive, difficult and slow from a board design point of view.
 
Tagrineth said:
Quantum3D did do a 32-chip VSA-100 which DID run at 10Gp/s.

AND the 16+ chip AAlchemy driver actually supports 16x 3dfx jittered scattered (er... I think that's what it's called... where there is one sample per row and column)-grid AA.

Sparse sampled AA?
iirc.
This si the bit i found interesting, anyways:
Multiple chassis solutions via dual-link DVI inputs and outputs for ultra-high-end applications
SO you can link together multiple of these beasts for even more power.....
That should beat those AAlchemy systems.
 
No, each chip has a dedicated 20GB/sec bw bus. So, total is 80 GB/s of BW. The screen is divided into tiles, and each chip gets some of those tiles ("supertile" quote).

That effectively gives you the 9.x GPixel/s fillrate. Since each chip is capable of doing early rejection of triangles outside their tiles, the effective early culling performance is actually 64 pixels per clock per chip, or a total of 64*4*325 = 83.2 GPixels/sec.
 
sireric said:
No, each chip has a dedicated 20GB/sec bw bus. So, total is 80 GB/s of BW. The screen is divided into tiles, and each chip gets some of those tiles ("supertile" quote).

That effectively gives you the 9.x GPixel/s fillrate. Since each chip is capable of doing early rejection of triangles outside their tiles, the effective early culling performance is actually 64 pixels per clock per chip, or a total of 64*4*325 = 83.2 GPixels/sec.

Ouch...
 
Sireric - how is geomtry handled? Is each chip processing the same geometry (meaning the geometry rate is 325tris/s regardless of the number of chips) or some other method?
 
sireric said:
No, each chip has a dedicated 20GB/sec bw bus. So, total is 80 GB/s of BW. The screen is divided into tiles, and each chip gets some of those tiles ("supertile" quote).

That effectively gives you the 9.x GPixel/s fillrate. Since each chip is capable of doing early rejection of triangles outside their tiles, the effective early culling performance is actually 64 pixels per clock per chip, or a total of 64*4*325 = 83.2 GPixels/sec.

I dunno, they don't list any bandwidth numbers, all they say is

The link said:
Exceptional fill rates enabled by a 256-bit wide unified memory interface and integrated multi-chip supertiling

Unified.
 
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