MS to combine CPU and GPU at 65nm?

[Rangers]

Anandtech takes a look at the Jasper:

http://www.anandtech.com/gadgets/showdoc.aspx?i=3472

Hope it´s not an old link.

Excellent article. Only glaring omission is noise comparisons. They also do some wild speculating at the real cause of RROD (the bumps connecting the GPU to the GPU package) and speculate that it may be truly cured in Jasper as they think it would have been a good time to redo these bumps correctly as it required a GPU respin.

They even do die size measurements of all three 360 revisions just for us.

360 altogether has a bit more silicon than I thought, combined the CPU, GPU and EDRAM still have 320mm^2 even on Jasper. As I said, more than I thought, more than RV770 for example.

 

[Megadrive1988]

interesting.

 

[Squilliam]

I wonder if its time to bump the thread?

Has anyone heard anything about if there is a console revision happening towards the end of 2009 for the Xbox 360 and if so, is it the rumoured 65/55nn revision or thereabouts according to this threads subject, or is it something else entirely like a 45nm CPU on its own? Unfortunately im rather dry on the subject, the rumours I heard were from the Ars mole about the Xbox 360 Premium/Elite Rejig which to me means they are introducing new HDD sizes, but unfortunately Microsoft has puckered up tighter than a snare drum and I haven't heard anything substantial about this.

Oh yeah one thing I was wondering about was how much space would the I/O hardware between the Xenon/Xenos and the Xenons/ED-Ram dies take up currently? Also how much of that could be deleted when they eventually combine the two/three dies onto the same chip?

 

[noneofexion]

an interesting look (with main board pictures) at the revisions to the 360
http://beta.ivancover.com/wiki/index.php/Xbox_360_Revisions

the codename "Valhalla" combo motherboard is, according to the site (but likely pure speculation) slated for 2009

 

[Silent_Buddha]

I'd imagine if a CPU/GPU on same die is on the drawing boards it'll most like be in 2010, even if originally slated for 2009. I can't imagine MS would be keen to have a 65nm version it. And with the troubles TSMC is (was) having with 40 nm, I doubt MS wants to contract anything on that process node until it's proven to have had the kinks worked out.

Regards,
SB

 

[Tchock]

Are going to be that ambitious with Valhalla? They're not really needing simplification in that sector yet unless a 360 chassis design is incoming (chance for MS to ditch steel and go with plastique! )

I *really* doubt it would be a 1-die chip. It could be 2 dies on 1 package aka an MCM (EDRAM now + GPU, and CPU), but 1 die alone would be counterintuitive and hassleful and in the end wouldn't help much compared to a multi chip module.

Anyway Valhalla's rumored specs don't make that much sense too- There has been no news on Xenon transitioning from the previous Chartered Semiconductor SOI process to a traditional bulk process that TSMC uses.

What I could see however, is MS switching from Chartered (which AFAIK is transitioning to 45 slowly) to GlobalFoundries Fab 1's 45nm SOI.

A Chartered -> GF dumb shrink would perhaps incur much less hassle than a SOI to bulk transition, and given that Chartered's 65nm silicon characteristics were like AMD's 65nm tech, which I have to say was quite bad relatively once clocks and voltage scaled up, the 45nm jump could actually bring a really nice reduction in terms of power consumption. 20W load reduction wouldn't be unreasonable.

On the GPU side, TMSC has just resolved its bigger issues with 40nm. Talk about timing.

TSMC's 40nm should help Xenos in terms of die area and density, so GPU and eDRAM could be combined into one. Power should go down to an extent, as Xenos is on the lower end of the clock curve and probably won't push leakage (if rampant) on the process to an inconvenient stage.

MS might take a few months more to wait it out, and to clear inventory of Falcon/Zephyr that really needs to be gone, then start getting Valhalla rolled out.