Is there an equivalent to AGP Apature for PCIE?

[ChrisRay]

I have tried 2 different SLI systems.

Gigabyte and Asus. And neither allows me to modify the memory address size for the system memory. Is there an equivalent of it? Or is this handled different with PCIE?

 

[bloodbob]

I'd assume there is no apature. I'm assuming any memory allocated is done via drivers its not like you would want a graphics memory apature for a network card is it.

 

[OpenGL guy]

I have tried 2 different SLI systems.

Gigabyte and Asus. And neither allows me to modify the memory address size for the system memory. Is there an equivalent of it? Or is this handled different with PCIE?

There is no such setting for discrete video cards. The PCIE GART is owned by the video card, therefor it's up to the driver to determine how pages are allocated/freed. Generally, there's no need for a fixed aperture.

Integrated PCIE solutions may still offer a BIOS setting to select how much memory is to be reserved for the framebuffer.

 

[ChrisRay]

I have tried 2 different SLI systems.

Gigabyte and Asus. And neither allows me to modify the memory address size for the system memory. Is there an equivalent of it? Or is this handled different with PCIE?

There is no such setting for discrete video cards. The PCIE GART is owned by the video card, therefor it's up to the driver to determine how pages are allocated/freed. Generally, there's no need for a fixed aperture.

Integrated PCIE solutions may still offer a BIOS setting to select how much memory is to be reserved for the framebuffer.

Thanks for that . I have only ever needed it in wierd scenerios where I have exceeded my memory with AA with AGP. I havent run into that problem with PCIE so I assume its being properly handled. I just wanted to make sure. Would conventional means such as SiSoft report it correctly? For instance SiSoft would report your Apature size and Onboard memory. It shows something like this. I'll guess I'll have to test it.

Sisoft Sandra under "Video System Information") for texture memory? I'm pretty sure that the 6800GT will show <256MB for video and <256MB for AGP (something like ~510MB total texture memory?).

This is what I mean.

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[KimB]

Well, that's just what the driver is reporting to the program, and should therefore be what games will see. It may be flexible, however.

 

[Ailuros]

SiSoft updates it's software frequently according to hard-/software changes for systems; I'd expect future versions to include those for PCI-E systems too.

 

[aaronbond]

As OpenGL Guy said PCI-E graphics have GART table built-in so Aperture is not needed. Is it still an option in BIOS on PCI-E boards?? Just wondering?

 

[KimB]

As OpenGL Guy said PCI-E graphics have GART table built-in so Aperture is not needed. Is it still an option in BIOS on PCI-E boards?? Just wondering?

There is no concept of an Aperture with PCI Express built into the hardware. It's purely a software/driver phenomenon.

 

[ChrisRay]

Sorry about my spelling with this word btw. I've always had trouble with it. I cant pronounce it and thats probably why

 

[Guden Oden]

I cant pronounce it and thats probably why

Can't pronounce what, you said?

Anyway, it's good PCIe does away with the aperture crap; that's certainly THE most misunderstood aspect of PCs ever, in my experience at least.

 

[ChrisRay]

I cant pronounce it and thats probably why

Can't pronounce what, you said?

Anyway, it's good PCIe does away with the aperture crap; that's certainly THE most misunderstood aspect of PCs ever, in my experience at least.

aperture.. apature.. Bah I just cant say pronounce it. ><

I agree though alot of people have a grave misconception of its purpose. So far the only times I have found it useful is when I am testing extreme anti aliasing methods. It also was useful for the Ruby demo.

 

[Scott C]

AGP Apeture has NOTHING to do with how much of your RAM the video card gets.

Gigabyte and Asus. And neither allows me to modify the memory address size for the system memory. Is there an equivalent of it? Or is this handled different with PCIE?

The above quote suggests that the AGP apeture somehow controls how much physical memory the video card gets.

I had a TNT1 with system RAM of 64MB and apeture set to 256M. No problem, 32 bit hardare has access to 4GB of address space.
All the apeture does is specify address space mapping, not physical memory.

 

[OpenGL guy]

AGP Apeture has NOTHING to do with how much of your RAM the video card gets.

Actually, it does.

Gigabyte and Asus. And neither allows me to modify the memory address size for the system memory. Is there an equivalent of it? Or is this handled different with PCIE?

The above quote suggests that the AGP apeture somehow controls how much physical memory the video card gets.

I had a TNT1 with system RAM of 64MB and apeture set to 256M. No problem, 32 bit hardare has access to 4GB of address space.
All the apeture does is specify address space mapping, not physical memory.

You've misunderstood. Your TNT can't handle virtual memory, thus setting your apeture to 256 MB when your system memory is only 64 MB is pointless. (Your TNT accesses physical memory BTW.)

Drivers take into account different factors when determining how much AGP memory to allocate. One is the system BIOS setting, another is the Windows recommended apeture. Also the system memory size is taken into consideration. You wouldn't want all 64 MB of you system memory taken up by the video card as you wouldn't even be to boot Windows.

 

[Guden Oden]

But even AGP aperture memory seems to be allocated on a as-needed basis, as I have 512M physical and the aperture set to 256 in the BIOS, and I typically have more than 256M free, even with quite a lot of programs loaded.

 

[ChrisRay]

The only time I have needed to adjust my AGP aperture memory was for the Ruby Demo. As it required more memory than I had onboard with 3dc disabled. Also for early Anti Aliasing tests with a 64 meg Geforce 4 Ti 4200. I was just mostly concerned about not being able to adjust it if problems ever occured. Which I doubt they will.

 

[OpenGL guy]

But even AGP aperture memory seems to be allocated on a as-needed basis, as I have 512M physical and the aperture set to 256 in the BIOS, and I typically have more than 256M free, even with quite a lot of programs loaded.

It depends. Some things are statically allocated, others are dynamic. In any event, the AGP aperture is based on physical memory addresses so that will restrict the amount of physical memory is available for apps once the aperture is in use and that means more swapping.

 

[Caprice]

Ok, so no AGP aperture equivalent in PCI-e. What about "TLP payload size" then ? In my little LV-672 board I have not much to tinker with but there´s the this "thing". After some googling I found out that it is meaning Transportation Layer Packet payload size :? :

"The PCI Express protocol specifies a special packet to transmit payload data. This packet is
called Transaction Layer Protocol or TLP. In
addition to the actual data, the TLP adds a header
that carries information such as packet size,
message type (memory, I/O, or configuration),
traffic class for QoS and any modifications to the
default handling of the transaction (for example,
relaxed ordering, or snooping)"

Link

Has it´s value (can´t remember what it´s set at in bios) any importance regarding performance using system memory?

 

[KimB]

Looks like TLP/DLLP is a way for PCI Express to transfer its signalling information within the bus instead of on a separate bus. Basically this is an optimization that decreases effective bandwidth for the bus, but is made to decrease cost by reducing the pincount (and, alternatively, allowing for larger total bandwidth).

This is more of an optimization, then, on how efficient the bus itself is. Possible effects could be viewed when inspecting the performance of any high-bandwidth or latency-sensitive applications, such as Gigabit ethernet or some graphics applications.

 

[Caprice]

It looks similar to the 7 OSI layers...Brr, remember.

 

[Rolf N]

Looks like TLP/DLLP is a way for PCI Express to transfer its signalling information within the bus instead of on a separate bus. Basically this is an optimization that decreases effective bandwidth for the bus, but is made to decrease cost by reducing the pincount (and, alternatively, allowing for larger total bandwidth).

This is more of an optimization, then, on how efficient the bus itself is. Possible effects could be viewed when inspecting the performance of any high-bandwidth or latency-sensitive applications, such as Gigabit ethernet or some graphics applications.

I believe that if you don't have dedicated clock and signal lines, the system becomes more robust. Because you don't have to sync signal and clock, there are no headaches about equal physical wire delay between the two, and that in turn might enable you to crank the clock speed up higher.

Just theorizing here ... I know e.g. HyperTransport does it slightly differently. But then again, it goes to some lengths to avoid requiring equal trace lengths between lots of wires (one clock line per four data lines IIRC). If this wasn't beneficial in some way, noone would do it.