Most CPU benchmarks right now aren't showing much tangible improvement going to higher RAM clocks or even quad channels for high end x86 systems (SB vs SB-E). There's no evidence that we're at a point where common CPU tasks are heavily bandwidth limited. Lower latency might help but moving to GDDR5 doesn't give you anything there.
Haswell vs Kaveri
- Thread starter AnarchX
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Most CPU benchmarks right now aren't showing much tangible improvement going to higher RAM clocks or even quad channels for high end x86 systems (SB vs SB-E). There's no evidence that we're at a point where common CPU tasks are heavily bandwidth limited. Lower latency might help but moving to GDDR5 doesn't give you anything there.
UniversalTruth
Veteran
Perhaps because most motherboards in this segment come with two slots for memory? I mean they are small and...
Pricing is a very relative thing. I'm sure they can afford to push and regulate it. And how expensive is it really?
These things are APUs though, and the graphics side is sharing the same bus:
http://www.anandtech.com/show/6372/...3-to-ddr32400-on-ivy-bridge-igp-with-gskill/9
Sure but zero motherboards in this segment support GDDR5, and there's no such thing as a GDDR5 DIMM
My point is if they're already going something custom, they could presumably solder quad-channel DDR3 or whatever they want as easily as GDDR...It's not too expensive to make, it's too expensive to be competitive. The only reason to buy an APU instead of a normal CPU (or one with a weaker IGP) + discrete GPU is cost. If you pay a $50 delta for the memory they're probably squandering it.
It isn't just more expensive because the memory chips are more expensive, but because you need more of them and that increases manufacturing and assembly costs.
Yes, we all agree that they need to do something to increase bandwidth for the GPU, I just don't think that increasing it for the entire system is the answer, and a much better solution is an extra dedicated bus for a smaller amount of faster memory. Intel is doing it with Crystalwell and AMD could have dedicated a GDDR5 bus for this. They could of course allow both the CPU and GPU to access both buses so you don't need to put all of your graphics assets in the fast memory.
I think the answer will be something like a 128 or 256 bit DDR3 on PCB interface for PC and Tablet oriented APUs. This way, manufacturers can get better performance while continuing to do what they've been doing with GPUs for years without resorting to expensive on die / on package eDRAM. According to semi-accurate, OEMs are complaining loudly about the cost of Crystalwell.
If your answer is to go wider with cheap conventional memory then okay, but if you want faster, more expensive, and less power efficient energy don't make that your only memory pool. I'm not saying they need to go with eDRAM, I think a separate external interface would suffice. It seems to me they're trying to shave some expenses off the die size, package costs, and TDP, only to charge OEMs for far more than the difference in what they get pursuing huge amounts of GDDR5.
It's a different story for Sony since they're planning something that'll be used 5+ years down the road and are facing much less open competition.. AMD needs to make decisions that make sense just for this product line which will only be relevant for a year or two.
It's a different story for Sony since they're planning something that'll be used 5+ years down the road and are facing much less open competition.. AMD needs to make decisions that make sense just for this product line which will only be relevant for a year or two.
I haven't found a comparison of current low-voltage DDR3 versus current low-power GDDR5. In terms of absolute power and watts per capacity, GDDR5 would probably lose. Watts per GB/s is something that GDDR5 is much more competitive in. Even if it's a minor loss, it doesn't matter if the goal is for AMD's GDDR5 SKU to not wind up throttled when benchmarked against Crystallwell.
Doubling the interface width is actually the fastest way to increase power consumption, and 256 bits implies increased board costs, a new socket, and a larger die. Trinity doesn't quite have enough perimeter to double its interface.
The utility of memory capacity above 4-8 GB is such that the cheapness of even more memory is not going to sell more chips for AMD. If you want that much memory, AMD's chips are likely a secondary choice anyway.
The dual-mode controller allows the use of the same chip, and same socket, if the memory isn't on-package. It's not an ideal solution, but probably the fast and cheap way AMD could bring anything to bear. The rumors saying that the next gen of APU can also be an PCIe endpoint is interesting, as that might mean merging the APU and low to midrange GPU silicon lines.
(EDIT: And if AMD copy-pasted its dual-mode controller from the GPUs that already support either memory type, it's even cheaper for AMD.)
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I think this makes perfect sense, I'm just amazed that we're seeing it as early as Kaveri.
HD5200/Crystalwell is designed for high performance/low power laptops (i.e. non discrete). That's also Kaveri's market (as well as entry level desktops). If Kaveri can't clearly outperform HD5200 in graphical terms then it's screwed in the laptop market since the CPU will obviously be inferior to Haswell. And the only way it's going to outperform HD5200 is with a much faster memory interface than that in Trinity.
I don't see the extra expense being a big factor here as high performance/low power notebooks can be pretty expensive to begin with and adding a discrete GPU for more powerformance at a lower cost isn't really an option due to the power concerns. Also, since we've already heard HD5200 is pretty expensive then Kaveri can afford to be so also given that will be it's main competition in that market.
So 4GB (which is the maximum possible GDDR5 configuration of this design as far as I know) fits reasonably well with the performance profile/target market of Kaveri while the higher price is justified by extremely high performance for a given TDP.
The DDR3 interface could well be reserved for use in slower/cheaper laptops and desktops where memory size would be considered important and power draw isn't an issue so more graphics power can be applied though the use of a discrete GPU (although the desktop market Kaveri is aimed at probably isn't overly interested in gaming performance anyway).
With regards to the argument of adding both a DDR3 and GDDR5 interface on the same chip, surely this completely defeats the main selling point of Kaveri and its HSA/fully memory coherent architecture? It would be quite bizarre for AMD to release Kaveri as a massive step forward from Trinity in terms of a true heterogeneous system while at the same time splitting the memory pools in two where Trinity shared the same pool for both CPU and GPU.
Oh, and I'm impressed with the possibility of 3 CPU CU's as well (why the hell does AMD have to call everything a CU?) this chip should be a very decent performer for it's power range and would even be a pretty decent chip in a high end desktop system using the DDR3 interface and a discrete GPU - especially if the IGP can be dedicated to GPGPU operations within games.
Incidentally, I think the evolution of this into something resembling PS4 on a chip is pretty clear now. 2 of these things basically is a PS4 with a better CPU and slower memory. In addition the PCI endpoint option may well see 3dilettantes PS4 on an PCI-E card come about sooner than we think. Having said that though I'd expect that to be in the form of a Kaveri successor sporting GDDR6, Excavator and GCN2 along with AMD's next generation HSA. Such an APU would be a wonder to behold and we might even see if before the end of next year!
HD5200/Crystalwell is designed for high performance/low power laptops (i.e. non discrete). That's also Kaveri's market (as well as entry level desktops). If Kaveri can't clearly outperform HD5200 in graphical terms then it's screwed in the laptop market since the CPU will obviously be inferior to Haswell. And the only way it's going to outperform HD5200 is with a much faster memory interface than that in Trinity.
I don't see the extra expense being a big factor here as high performance/low power notebooks can be pretty expensive to begin with and adding a discrete GPU for more powerformance at a lower cost isn't really an option due to the power concerns. Also, since we've already heard HD5200 is pretty expensive then Kaveri can afford to be so also given that will be it's main competition in that market.
So 4GB (which is the maximum possible GDDR5 configuration of this design as far as I know) fits reasonably well with the performance profile/target market of Kaveri while the higher price is justified by extremely high performance for a given TDP.
The DDR3 interface could well be reserved for use in slower/cheaper laptops and desktops where memory size would be considered important and power draw isn't an issue so more graphics power can be applied though the use of a discrete GPU (although the desktop market Kaveri is aimed at probably isn't overly interested in gaming performance anyway).
With regards to the argument of adding both a DDR3 and GDDR5 interface on the same chip, surely this completely defeats the main selling point of Kaveri and its HSA/fully memory coherent architecture? It would be quite bizarre for AMD to release Kaveri as a massive step forward from Trinity in terms of a true heterogeneous system while at the same time splitting the memory pools in two where Trinity shared the same pool for both CPU and GPU.
Oh, and I'm impressed with the possibility of 3 CPU CU's as well (why the hell does AMD have to call everything a CU?) this chip should be a very decent performer for it's power range and would even be a pretty decent chip in a high end desktop system using the DDR3 interface and a discrete GPU - especially if the IGP can be dedicated to GPGPU operations within games.
Incidentally, I think the evolution of this into something resembling PS4 on a chip is pretty clear now. 2 of these things basically is a PS4 with a better CPU and slower memory. In addition the PCI endpoint option may well see 3dilettantes PS4 on an PCI-E card come about sooner than we think. Having said that though I'd expect that to be in the form of a Kaveri successor sporting GDDR6, Excavator and GCN2 along with AMD's next generation HSA. Such an APU would be a wonder to behold and we might even see if before the end of next year!
Sure, although to that end, is 50GB/s shared enough?
I agree, but I was assuming 2GB here, cost-wise. You really think they can justify the premium for even 4GB in such a product? Maybe the slower GDDR5 is a lot cheaper though, I dunno.
What does it mean to be a "PCIe endpoint"? i.e. it can control PCIe transfers or similar? I thought any devices on such an interface could do stuff like that without involving the CPU already, no?
7750 DDR3 1600 MHz is 53% slower than 7750 DDR5 - http://ht4u.net/reviews/2012/msi_radeon_hd_7750_2gb_ddr3_test/index36.php
That's how much AMD needs to not be on DDR3 now. If they are to step up from $40 IGP to $100 IGP they need to have at least double their current bandwidth.
Is there any good reason why they can't make their own GDDR5 at GF? They are supplying the APU's to the OEM's, why not the memory to go with it?
That's how much AMD needs to not be on DDR3 now. If they are to step up from $40 IGP to $100 IGP they need to have at least double their current bandwidth.
Is there any good reason why they can't make their own GDDR5 at GF? They are supplying the APU's to the OEM's, why not the memory to go with it?
I don't know what the measure of enough is, beyond whether it reduces the amount of time the GPU i
is bandwidth-limited, since it's here that Intel's graphics draw closest.
It might be a niche novelty for some kind of halo effect. Crystalwell isn't rumored to be very cheap, either.
I'm going from the speculation of that BSN piece, which is why I'm taking it with a massive dose of salt. The implication is that the APU could be configured so that it was no longer the PCIe host, and that it would operate as a slave device on the other end of an expansion bus.
While it might not be ideal in all facets from having a cheap GPU, since there is more system silicon going to waste, it means AMD could keep certain discrete GPU products viable longer than their separate volume requirements would indicate. AMD CPUs could wind up in a bunch of Intel systems, oddly enough.
It's a different fabrication process and a price segment GF is not targeting. It also would help not fighting some massively entrenched competitors in a difficult DRAM market.
Didn't GF buy out a DRAM maker's fab last year? ProMOS I think...
Again, not saying AMD will do it, just that for their own products they could theoretically do it, especially if they need larger chips for 8GB of memory?
I don't recall any major players being acquired.
Do you have data on this? In the mobile arena we're pretty routinely seeing vendors chase wider interface widths over doubling data rate per pin. Wider and slower tends to use less power.
pjbliverpool said:
I on the other hand think that limiting a laptop to a max of 4GB memory ever is going to limit the market. Kaveri should be playing to the crowd who wants a gaming solution with strong perf/W (battery life) and not just something cheaper. I'm not a PC gamer but there's no way I'd buy a laptop with only 4GB of RAM, even if that's enough for games people will want to do other things on them.
A quick look an Newegg shows I can buy an 8GB Trinity laptop for $630, and many 6GB ones for under $600 or even under $500. So the market exists and it's not at a luxury pricing. I'm also finding none with < 4GB so I wonder how much that market even exists..
pjbliverpool said:
Nothing about separate physical interfaces means that the address space can't be fully unified and coherent.
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AMD isn't ceasing support for the standard speed grades, so it's going to be a wider bus that will be just as fast, assuming a value motherboard designer wants to build a quad-channel DDR3 product.
If this is meant to not look bad in relation to an on-package or on-interposer bandwidth solution like Crystalwell, the slower part has been precluded.
I don't think AMD can. My logic going into this, assuming there is truth to the rumor, is that they are doing everything they can to reuse and hack together what they have to save on the costs AMD incurs. The result isn't necessarily all that great, but may be what they can afford.
So where do you guys think this part is aimed? High end laptops? Desktops? Seems questionable to fit into ultrabook-class stuff or smaller, no?
When I say wider and slower I meant per pin. Apple, for instance, went with a 128-bit bus to feed the GPU on their tablet parts, rather than go for higher clock speeds on the memory which should have been an option to at least some extent. GDDR5 looks like what you go for when you've already pushed the bus width to reasonable limits. If it really offered better perf/W on a more narrow interface vs DDR3 why is it only now being used? I'm sure Intel would love to have made it an option for low-TDP parts if 64-bit GDDR5 really used less power for the same bandwidth as 128-bit DDR3...
So the question remains: is this really less power vs a 256-bit DDR3 configuration that provides similar throughput?
Simultaneously raising the capability of the lower end product class (Kabini) and lowering the capability of the higher end one by restricting it to 4GB - where it's currently being sold in 6GB and 8GB laptop configurations for relatively low prices - sounds like a bad move for AMD.
But I agree that it looks like AMD is trying to save design and manufacturing costs here. One die that has both DDR3 and GDDR5 controller, with technology heavily lifted from existing GPU designs, keep die and package sizes similar to existing Trinity ones, and thrust the cost burden on OEMs and motherboard manufacturers.
In fact, I wonder if the exact same SKUs will allow either memory type.
Among the reasons to not use GDDR5 before, the latest doubling in chip densities didn't exist, it probably does have higher absolute power consumption, and the competition wasn't as stiff.
Sony's choice in using GDDR5 has given some impetus to increase the Gbit density of the memory, and it probably helped pay for the APU memory controller AMD would be using.
A 256-bit board would have required even more work than what Apple did with its bus, and I suspect AMD cannot count on Apple's volumes to justify the design and production of a custom chip or custom board layout.
It may not, but it can be done without a larger die or more complex board.
It increases the design's appeal in a very narrow band with relatively little effort. The alternative was to increase its appeal nowhere.
It'd probably be the same chip. For device manufacturers using the BGA model, maybe they could switch it at their discretion. The socketed desktop models would be DDR3 from the outset.
The big "unless" is if AMD made an on-package module like it has done for mobile GPUs. In which case, the flexibility isn't there.
