G70, G71, R520, R580 die size discrepancy

[Jawed]

110nm being a half-node (i.e. producing dies that are larger than a simple %age shrink would imply) actually increases the likelihood - less %age shrink is required from 110nm to 90nm, if the 110nm version starts out "too large".

In other words if 110nm results in G70 being, say, 70% bigger than G71 because some features on 110nm are sized as though they're at 130nm, then that's an excess of 20% compared to the naive "110nm is 50% bigger than 90nm" metric.

But it's all too fiddlesome just to throw around percentages. And as I've described in the other thread, a "large" R580 isn't necessarily lower-yielding than G71.

Jawed

 

[atomt]

I was under the impression that TSMC's 110nm is a half-node, meaning that some features are shrunk, but others are not.

If that's so, then it means that 110nm produces a larger die than would be expected.

It would also mean that %age scalings from 130nm to 110nm and from 110nm to 90nm are invalid. Let alone the reasons given earlier for the way that different kinds of features (e.g. RAM) scale differently with varying processes.

So, all in all, it seems like a fools-errand to evaluate die size at 90nm based on 110nm.

Jawed

Let put aside the process shrink % speculation.

Does Nvidia change the heatsink mounting holes (i.e. the distance between the 4 holes) between boards? I use both package size and heatsink as reference and arrive at die size of 250-260mm^2. (B3D pictures have aspect ratio problem.
The package is square on other sites while it is rectangular at B3D)

Why did my measurements differ so much from Nvidia? Did I make use of wrong references or the fictional die size marketing BS from Nvidia? A smaller die size would be of interest to investors due to lower manufacturing cost. A consumer should only care about the performance and the retail price and not about manufacturing cost/profit margins for ATI or Nvidia.

 

[Sunrise]

I was under the impression that TSMC's 110nm is a half-node, meaning that some features are shrunk, but others are not.

Half-Node means "one step in-between major nodes", which doesn´t imply that "some features are shrunk, but others are not". It´s a "half step" in-between major nodes, meaning it is a lithographic shrink of the 130nm process technology, and not a "major step" like 130nm -> 90nm. That´s why it´s called "half-node".

G71 is a lot less complex than R580, it also has the low-k advantage (in comparison to NV40/G70, not to R580, obviously) so this is actually the first time they really needed to adjust the whole design, which took them quite a while, as already pointed out. With Low-K they could reduce die size while still keeping your hot spots at a minimum, redundancy is reduced, density is higher, though.

As atomt just pointed out, "Let´s put aside the process shrink % speculation."

Let´s not forget that there are still Dave´s (or NV´s, they are one and the same) die size figures standing in the room here, those figures imply that G70 is smaller than R580, which can´t be right, can it?.

 

[atomt]

But it's all too fiddlesome just to throw around percentages. And as I've described in the other thread, a "large" R580 isn't necessarily lower-yielding than G71.

Jawed

I agree that it is too fiddlesome to throw around percentages. It is at best a very rough
approximation because we don't know how many ML are used.

A larger die need not be lower-yielding. There are differences in redundacies. There also experience that helps with a better layout that have less marginality. (excuse me, I have
not read all the posts)

However, Nvidia pretty much have to F-up (I mean capital F) to yield lower if G71 is indeed 1/2 the size of R580. If G71 is 250-260mm^2, ATI could make up some of the yield difference with higher ASP.

What I really want is someone to confirm the measurements using similar or different method. Die size is not a speculation like transistor count.

When someone gets hold of a board on Mar 9th. If I am wrong, not much damage other than some worthless pride. If Nvidia is wrong, what was their marketing thinking. We all freaking idiots that don't know how to use a ruler?

 

[Dave Baumann]

http://www.beyond3d.com/misc/chipcomp/

Keep your eyes on that.

 

[Sunrise]

http://www.beyond3d.com/misc/chipcomp/

Keep your eyes on that.

Dave, did you measure them yourself? Or are those figures taken from another "source"?

G70 - 334mm² - [18.65mm (w) x 17.9mm (h)]
R580 - 352mm² - [18.5mm (w) x 19mm (h)]

Shouldn´t G70 be of bigger size than R580? What´s your take on that?

EDIT: While we´re at it, you also have G70 listed at 300 million transistors, which strikes me as odd, shouldn´t that read 302 million transistors?

 

[SugarCoat]

ATI's die sizes havent always been conservative. This is evident in the R420, R423, and R480 which were all larger then the NV40.
NV40 130nm; 222M transistors; 287mm2
R420/R423/R480 130nm; 160M transistors; 289mm2

with the launch of the R520 we saw a core that was huge for 90nm, but remained just under the physical size of the 110nm G70 while remaining at about the same physical size of ATI's previous flagship chips.
G70 110nm; 302M transistors; 334mm2,
R520 90nm; 321M transistors; 288mm2

now if we assume the R520 numbers to be correct, the R580 increased transistor count by about 20% over its younger brother, and die size increased about 22% you end up with 384M transistors stuck in a space of 352mm2 (3 times the pixel power + fetch4 for about 60 transistors so technically this was a good deal).

More importantly if ATI can double transistor numbers when comparing the R420 flagship cores to the R520 and keep physical space about the same, then there is no reason to assume that the G71 couldnt trim at least 30-35% physical size off its G70 counterpart. That would bring it down to about 233mm2-217mm2. I dont think the 110nm G70 wasted space, so unless there are infact reduced transistor counts, or half node dont do nearly as much as we all think in terms of physical size, i dont see the core being smaller then 200mm2 without some serious effort. On the other hand if the 110nm shrink doesnt do much, then i think its completely in the realm of possability to get a ~41% reduction. ATI doubled transistor counts and kept the die space about the same from 130nm to 90nm, now we're talking about leaving the same transitor counts when going from 110nm to 90nm for nvidia. Is it really that asinine? Thats my 2 cents.

 

[atomt]

http://www.beyond3d.com/misc/chipcomp/

Keep your eyes on that.

COOL! Add die size to it. All die/package pictures look pretty much alike and uninteresting, so blame Nvidia for bringing up die size as a topic.

performance per squared-millimeter

http://www.beyond3d.com/forum/showthread.php?t=28841

 

[Jawed]

[...]

With Low-K they could reduce die size while still keeping your hot spots at a minimum, redundancy is reduced, density is higher, though.

[...]

Let´s not forget that there are still Dave´s (or NV´s, they are one and the same) die size figures standing in the room here, those figures imply that G70 is smaller than R580, which can´t be right, can it?.

Well I admit, I'm puzzled why everyone's suspicious that NVidia has implemented G71 at ~200mm2.

It seems eminently possible to me.

G70 could be smaller than R580, why not?

As I've been arguing, R580 could well be deliberately "over-sized", and not to mention that for a given die size, ATI claims less transistors than NVidia.

So, all in all, I think it's quite feasible that G71 is ~200mm2. Blimey, pity me for defending NVidia

Jawed

 

[atomt]

So, all in all, I think it's quite feasible that G71 is ~200mm2. Blimey, pity me for defending NVidia

Jawed

Can someone use some ingenuity and try measuring it? Save a lot of speculation.
http://www.nvnews.net/vbulletin/showthread.php?t=65835

 

[Jawed]

However, Nvidia pretty much have to F-up (I mean capital F) to yield lower if G71 is indeed 1/2 the size of R580. If G71 is 250-260mm^2, ATI could make up some of the yield difference with higher ASP.

Well you could turn that argument around and say that ATI has fucked-up by making R580 so huge.

With such a brutish die, though, wouldn't you think they'd consider how to make it yield well? And as I've been saying, it seems likely that there's more than one way to skin the yield-cat.

This is why I'm loathe to get into the statistics of yields, cos a) I don't know how to work it out; b) I don't even know what all the parameters are; c) we'll find out through share price performance and analysts' calls, indirectly, what's happened with yields...

Jawed

 

[Jawed]

Dave, did you measure them yourself? Or are those figures taken from another "source"?

G70 - 334mm² - [18.65mm (w) x 17.9mm (h)]
R580 - 352mm² - [18.5mm (w) x 19mm (h)]

Shouldn´t G70 be of bigger size than R580? What´s your take on that?

EDIT: While we´re at it, you also have G70 listed at 300 million transistors, which strikes me as odd, shouldn´t that read 302 million transistors?

Doesn't Dave place the die on a flatbed scanner to produce the image? Surely if they're all scanned at 300ppi, then there's no need for a ruler.

I'm sure I've suggested this before...

Jawed

 

[Geo]

I've always thought G70 was much too big in relation to NV40 (which wasn't exactly economic regarding transistors either) and had expected around 250-260 million transistors for a 6 quad part before its launch. I guess after good initial results from G70, they thought the transition to 90nm along with a little "cleanup effort" could keep them competitive while shifting all resources to future projects.

Remembering the "hidden quads" conversation, I'd say you weren't the only one who thot that G70 was too big! :smile:

That's an interesting thot to juxtapose against atomt's speculation that they squeezed out some transistors, isn't it?

Edit: Or was that too subtle? I calculated 225mm2 myself for G70 trans count at 90nm. Somewhat smaller than where atomt came out, but still quite a bit bigger than 196mm2. So, yeah, if a bunch of transistors suddenly go missing in G71 we might want to reconsider if the "hidden quads" theory had some merit after all, and they've now jettisoned them as unnecessary on a much smaller die.

EditII: And if you don't like "hidden quad(s)", substitute any other level of redundancy to up yields on a gehenna big part, that wouldn't be nearly as attractive on a much smaller part.

 

[Sunrise]

Doesn't Dave place the die on a flatbed scanner to produce the image? Surely if they're all scanned at 300ppi, then there's no need for a ruler.

I'm sure I've suggested this before...

I don´t know how he does it, that´s why i´m asking. If we knew, it would surely save us some potential headaches playing around with these numbers in the future.

"18.65mm (w) x 17.9mm (h)" on that G70 page suggests he did some very precise measurements himself, regardless of doing it by hand or measuring it based on an actual image.

 

[Sunrise]

Well I admit, I'm puzzled why everyone's suspicious that NVidia has implemented G71 at ~200mm2.

It seems eminently possible to me.

Yeah, actually I´m puzzled, too. That´s why you should´ve adressed this one to atomt instead, because i´m not the one questioning that.

 

[atomt]

Yeah, actually I´m puzzled, too. That´s why you should´ve adressed this one to atomt instead, because i´m not the one questioning that.

I have been skeptical since I saw this picture (originally published by dailytech)
where the die size is ~ the same as Samsung FBGA (154mm^2) On closer examination,
2 rows of solder pads are not even connected, so it is fake. 1 day later, this picture was removed from the dailytech article.

http://publish.it168.com/diy/showBigPic.asp?cDocid=20060221256501&picid=599655.jpg

When I saw the new die picture which have laser marking G71-GT-N-A2, I took
out my ruler because a 1/2 node shrink of 56-59% is a bit too impressive (possible but not likely) and knowing marketing (whether it is ATI or Nvidia), I just have to check it.

 

[Sunrise]

I have been skeptical since I saw this picture (originally published by dailytech)
where the die size is ~ the same as Samsung FBGA (154mm^2) On closer examination,
2 rows of solder pads are not even connected, so it is fake. 1 day later, this picture was removed from the dailytech article.

I know, but we already discussed that here.

When I saw the new die picture which have laser marking G71-GT-N-A2, I took
out my ruler because a 1/2 node shrink of 56-59% is a bit too impressive (possible but not likely) and knowing marketing (whether it is ATI or Nvidia), I just have to check it.

It´s not just a simple shrink, as already pointed out.

 

[atomt]

Can someone use some ingenuity and try measuring it? Save a lot of speculation.
http://www.nvnews.net/vbulletin/showthread.php?t=65835

I compared the heatsink mounting holes of 7900GT and 7800GT vs PCI-E connector dimensions, so I am sure the heatsink mounting holes remains the same.

So I am pretty sure the die size of G71 is 250-260mm^2 and NO WAY it is < 200mm^2
unless the G71-GT-N-A2 is another fake.

Of course if someone else can independently measure the die size, that would be most assuring in case I made a big BOO-BOO in elementary calculations.

 

[{Sniping}Waste]

I have been skeptical since I saw this picture (originally published by dailytech)
where the die size is ~ the same as Samsung FBGA (154mm^2) On closer examination,
2 rows of solder pads are not even connected, so it is fake. 1 day later, this picture was removed from the dailytech article.

http://publish.it168.com/diy/showBigPic.asp?cDocid=20060221256501&picid=599655.jpg

When I saw the new die picture which have laser marking G71-GT-N-A2, I took
out my ruler because a 1/2 node shrink of 56-59% is a bit too impressive (possible but not likely) and knowing marketing (whether it is ATI or Nvidia), I just have to check it.

The pic you have there could be a G73 and not a G71. It looks about the right size for a G73.

 

[{Sniping}Waste]

Can someone use some ingenuity and try measuring it? Save a lot of speculation.
http://www.nvnews.net/vbulletin/showthread.php?t=65835

What a sad place. Talk about ppl soaking up PR garbage and the few that see it for what it is are ignored.