ELSA hints GT206 and GT212

[RussSchultz]

I thought 45LP is 45nm, while 45GS is 40nm.

Eh? I don't think. The 45 is the node, the LP and GS is the particular process at 45.

LP = low power
GS = General purpose

See http://www.tsmc.com/download/english/a05_literature/2_Advanced_Technology_Overview_Brochure_2007.pdf

Sorry if this has been answered elsewhere in the thread.

 

[silent_guy]

The low yield rates are one of the single biggest factors in NV's decision to transition away from GT200 ASAP, by my understanding.

The general rule should be: whenever someone brings up the word 'yield' (especially when it's a journalist), you can pretty much stop reading, unless the company itself is making the statement. (I haven't really followed this thread closely, but I doubt that this is the case here.)

Unexpected low yields are usually fairly easy to fix, because it's often due to some backend issue, such design rule violations or marginalities, crosstalk noise, issues with analog blocks or RAM's etc. In a lot of cases, the fix is just a metal spin away.

So by themselves, they are rarely a reason to shrink. Much better reasons are die size and price differential with the competition, road map/schedule of next generation etc.

 

[AnarchX]

Eh? I don't think. The 45 is the node, the LP and GS is the particular process at 45.

LP = low power
GS = General purpose

See http://www.tsmc.com/download/english/a05_literature/2_Advanced_Technology_Overview_Brochure_2007.pdf

Sorry if this has been answered elsewhere in the thread.

Furthermore, TSMC's 40nm General Purpose (40G, also known as 45GS) process is positioned as a full-node technology, although using half-node design rules, with IP ecosystem support. It provides 2.35 times the standard cell raw gate density of the 65nm process. TSMC's 40nm Low Power process (40LP) is also supported with a comprehensive IP infrastructure.
[...]
The 40nm General Purpose (40G, also known as 45GS) process is based on 40nm design rules that leverage the yield experience from 45LP. It will enter initial production in the middle of 2008.

http://www.tsmc.com/download/english/a05_literature/02_40_and_45_Nanometer_Process_Technology.pdf (newer than articles @B3D/RWT)

 

[CarstenS]

Not what I've heard.

Mind to share your insights?

 

[Raqia]

http://austin.net.au/ProductList/tabid/103/Default.aspx?Category=GRAPHICS+CARDS

Nvidia GeForce GTX 350 (Q4 2008) GT300-GPU 55nm PCI-E2.0 2GB GDDR5 512-bit

 

[Lukfi]

Again?

 

[rpg.314]

It seems hard to believe that they taped out 2 chips with different RAM's (gddr3 and gddr5) to be launched within months(weeks?) of each other. GDDR5 with 512 bit seems like overkill to me. And to top it all GT300 based gpu comes this year itself. That gives their flagship arch (gt 200 atm) ~6 months on the market.

There's clearly something amiss here

 

[DegustatoR]

2GB GDDR5 512-bit

That's just not gonna happen =)
(But it could be a 2x256-bit GDDR5...)

 

[INKster]

(But it could be a 2x256-bit GDDR5...)

My feelings exactly.

Then again, why bother with a dual GT300 on 55nm ?
Where's GT212 at 45/40nm ?

 

[Domell]

How could be there a 55nm GT300 when there is any GT300 on NVIDIAs roadmap? There are only GT206 and GT212 in 2009. I think this is fake... or GT300 is another GX2 combination with two GT200B GPUs.

 

[AnarchX]

Old rumors (google "GTX 350") posted as offer to arrest attention for this shop.

 

[DegustatoR]

Then again, why bother with a dual GT300 on 55nm ?
Where's GT212 at 45/40nm ?

They need some cost-effective way to counter RV770 ASAP.
GT212 is ways off i think and it'll be a competitor to RV870 probably.

 

[ShaidarHaran]

The general rule should be: whenever someone brings up the word 'yield' (especially when it's a journalist), you can pretty much stop reading, unless the company itself is making the statement. (I haven't really followed this thread closely, but I doubt that this is the case here.)

Unexpected low yields are usually fairly easy to fix, because it's often due to some backend issue, such design rule violations or marginalities, crosstalk noise, issues with analog blocks or RAM's etc. In a lot of cases, the fix is just a metal spin away.

So by themselves, they are rarely a reason to shrink. Much better reasons are die size and price differential with the competition, road map/schedule of next generation etc.

What do you mean by "fix low yileds with a spin"? If you have a huge die, you're going to have a certain amount of "critical" failures per wafer. With a 1.4 billion tranny chip, we're no doubt looking at one NV would like to stop manufacturing oh - yesterday.

 

[INKster]

What do you mean by "fix low yileds with a spin"? If you have a huge die, you're going to have a certain amount of "critical" failures per wafer. With a 1.4 billion tranny chip, we're no doubt looking at one NV would like to stop manufacturing oh - yesterday.

I second CarstenS.
Putting the current competitive price positioning aside, have you got any concrete, actual proof that GT200 is yielding lower per waffer than RV770 ? Specifically, the percentage of good dies versus bad ones per waffer, not just the raw number of working product ?

Remember that GT200 is not the direct market competitor to the low-end RV770 cores (that role goes to G92 and G92b), therefore, it is produced in much lower quantities...

 

[ShaidarHaran]

I second CarstenS.
Putting the current competitive price positioning aside, have you got any concrete, actual proof that GT200 is yielding lower per waffer than RV770 ? Specifically, the percentage of good dies versus bad ones per waffer, not just the raw number of working product ?

Well there's candidate dies per wafer, for one. Statistics are on my side here. You can play the "depends on what the meaning of is, is" game, but we all know I'm right.

Remember that GT200 is not the direct market competitor to the low-end RV770 cores (that role goes to G92 and G92b), therefore, it is produced in much lower quantities...

Sucks to be NV?

 

[INKster]

Well there's candidate dies per wafer, for one. Statistics are on my side here. You can play the "depends on what the meaning of is, is" game, but we all know I'm right.

Ok. Show them to us for good instead of playing repeatedly with innuendos. That's all we're asking.
(and i didn't even know TSMC shared those numbers to the outside world)

Sucks to be NV?

I wouldn't know, since i have absolutely no affiliation with them whatsoever.
But we all do know how quickly the tables can turn in the graphics industry, several times over...
It's not like AMD is threading lightly either.

 

[silent_guy]

What do you mean by "fix low yileds with a spin"?

I mean 'lower than expected by the statistical model'.

If you have a huge die, you're going to have a certain amount of "critical" failures per wafer.

Yes, of course, but since you know up front how large the die will be, you can't argue that those area related lower yield is unexpected.

Reread what I wrote: I'm not saying that a 55nm version would be useless, on the contrary, but you argued above that a 55nm version was decided upon because they discovered that the yield was lower than expected. That's unlikely IMHO.

 

[ShaidarHaran]

I mean 'lower than expected by the statistical model'.

All I'm saying is that GT200 is a huge chip, and can't be giving them great yields on a 65nm process. I think it behooves them to shrink it, ASAP.

Yes, of course, but since you know up front how large the die will be, you can't argue that those area related lower yield is unexpected.

Did they know "up front" what the die size would be? What about the return of NVIO? Methinks someone's running "wafer-thin" margins on them there chips

Reread what I wrote: I'm not saying that a 55nm version would be useless, on the contrary, but you argued above that a 55nm version was decided upon because they discovered that the yield was lower than expected. That's unlikely IMHO.

Where did I say that? What I said was that the yield rate on GT200 was so low it caused NV to be proactive about transitioning to something that provides higher margins on a 55nm process. I did not say anything WRT design decision impetus, however were I an engineer looking at a mammoth GPU the size of GT200, I'd be thinking "how can we best shrink this chip on the next process node?" With RV770/R700's existence in the market, NV is selling GT200 kit at margins they haven't seen, perhaps ever.

 

[DegustatoR]

Did they know "up front" what the die size would be?

Are you serious?

What about the return of NVIO? Methinks someone's running "wafer-thin" margins on them there chips

I thought it was already established several times that NVIO has nothing to do with the die size of G80 and GT200?

What I said was that the yield rate on GT200 was so low it caused NV to be proactive about transitioning to something that provides higher margins on a 55nm process.

Let's try again: yield rates of GT200 are fine, they're _as expected_ from such chip on such process.
The problem is the pricing which wasn't supposed to be so low because a) GT200 was to be released in the end of 2007 against R650 or RV670X2 or any other AMD part of that time period and b) after they missed the timeframe they heavily underestimated RV770 performance.

I did not say anything WRT design decision impetus, however were I an engineer looking at a mammoth GPU the size of GT200, I'd be thinking "how can we best shrink this chip on the next process node?"

That's what they're always thinking about. GT200 isn't in any way different here.

With RV770/R700's existence in the market, NV is selling GT200 kit at margins they haven't seen, perhaps ever.

And this is why they were wrong when they decided to counter RV770 with (somewhat late) GT200. They probably should postponed (or scraped altogether) GT200 in favor of GT206, bring GT206 (which i think isn't "a shrink" of GT200 at all) forward and release it against RV770 sooner.
But they underestimated RV770 performance and are taking losses right now because of this mistake.

 

[Arty]

I thought it was already established several times that NVIO has nothing to do with the die size of G80 and GT200?

What? I thought that the NVIO's existence was purely to increase yeilds, again based on die-size.