And I roughly stick to it, and I think the range of specs I'd find plausible for GT216 is all the way from 3T/72A to 4T/160A.
From the RV740 thread:
I'd be very surprised if Nvidia stuck to 3 SIMDs in the TPC's for the lower end GT2xx stuff. It just wouldnt match up well with what's out there now. 3T/72A will probably not impress vs the current 4T/64A of G94b and I don't think they'll jump all the way to 5 SIMDs just yet.
If I were a betting man my completely unfounded guess for a 40nm GT2xx lineup using your notation would be:
GT212: 10T/320A @ ~ 1650Mhz (Q2/Q3 09) with 8T/256A yield-enhancing SKU.
GT214: 5T/160A @ ~ 1650Mhz (Q1/Q2 09)
GT216: 2T/64A @ ~ 1650Mhz (Q1/Q2 09)
GT218: 1T/32A @ 1500Mhz (Q3/Q4 09)
I'm betting Nvidia will try to go small and fast this time around like they did with G71 and G92. Which would mean their first big 40nm part will be GT3xx ~ Q1 2010. Every generation most people bet too high, so I'm gonna play devil's advocate and bet low this time
Whatever their plans in the $100-$200 segment, I'm sure RV740 screwed them all up though.
Hmmm - what are those clocks? If those are core clocks, what do the shader clock look like - 5GHz? If those are shader clocks, isn't that a bit low given the claimed 40nm performance boosts by TSMC?
Arnold: Yeah, that comes from people using AMD nomenclature for NV products, since in AMD's case it makes sense there are 4 SIMDs in R600 and 10 in RV770, while in NVIDIA's case clearly there are multiple instructions per cluster. I meant 5 multi-processors per cluster personally, with the "half-MUL/SFU" catch I explained in another thread.
I'm lost here: T = TPC so it's Cluster or SIMD, too?
A SIMD with 5 Cores (or multi-processors)? Possible? Yes. Usefull and Efficient? Hm...
Dual-Issue would be a real fun with 5 cores per Cluster/SIMD.
I'm really a lucky guy being so far away, that you can't hit me by a frying pan.
http://www.beyond3d.com/content/reviews/51/3
My understanding: The multi-processors work on their own warps, but they all execute the same instruction (the same TCP of course)?
Each SP in each SM runs the same instruction per clock as the others, but each SM in a cluster can run its own instruction. Therefore in any given cycle, SMs in a cluster are potentially executing a different instruction in a shader program in SIMD fashion.
Hmmm - what are those clocks? If those are core clocks, what do the shader clock look like - 5GHz? If those are shader clocks, isn't that a bit low given the claimed 40nm performance boosts by TSMC?
PS. How do you think how big could be GT212 with specs like above in 40 nm? Is there any chance to have below 300mm^2?
Wasn't that the SPMD model (Single Program/Process, Multiple Data), or in a shader "wording" -- single kernel on multitude of batches?My understanding: The multi-processors work on their own warps, but they all execute the same instruction (the same TCP of course)?
Seems that they are really working on GT214 and even considering GDDR5:
http://www.linkedin.com/pub/3/255/6b3
Meh, GT212/GT214/GT216/GT218 codenames were leaked, what, in 3Q07? If he gets any real trouble for putting that on his resume, his boss should seriously reconsider his value to humanity.Poor guy is soooo fired (or maybe it's a smoke screen)
GT300-or-whatever-it's-called was still slated for 4Q09 last time NV talked about it I think - clearly they want to be able to showcase a performance boost there. I wouldn't be surprised if GT212 was 384-bit GDDR5 and GT300 was 512-bit GDDR5, but then again I really have no idea about the memory config of either TBH.I wonder if nVidia keeps the naming scheme that would put GT214 in the lower midrange, GT212 into upper midrange and so on... if so, then why do we have rumours about GT212, GT214 and GT216 but no GT210 as a high-end monolithic monster chip?
(my emphasis) is pretty interesting thereDid frame buffer simulation (DDR2/GDDR3/GDDR5) for various boards for G96 and GT214