Doubt about the R580 architecture (?)

[Guilherme]

Hi people, i need your help! I know that you knows a lot about GPU hardware and i´m having some dificulties to understand the R580 architecture.

I´m not understating where the 16 pipes come in! Does the pipes comes before de dispatch processor filling it with raw pixels or does the pipes have the Quad pixel shader cores inside together with the TMUs and ROPS? If is the second, how the stages of pipelines can work simutaneously with the Quad core?

Thanks for help, sorry my fuc...ing english!!

 

[AlphaWolf]

Hi people, i need your help! I know that you knows a lot about GPU hardware and i´m having some dificulties to understand the R580 architecture.

I´m not understating where the 16 pipes come in! Does the pipes comes before de dispatch processor filling it with raw pixels or does the pipes have the Quad pixel shader cores inside together with the TMUs and ROPS? If is the second, how the stages of pipelines can work simutaneously with the Quad core?

Thanks for help, sorry my fuc...ing english!!

Throw out the entire concept of pipes and you will better understand the r580.

 

[Guilherme]

I know what is a pipeline, actually I study ciency of computation.

 

[digitalwanderer]

I know what is a pipeline, actually I study ciency of computation.

You know what a pipeline was then, try the A-Wolf's advice.

 

[Guilherme]

Why should i know about pipelines, else the concept of fordism or advance the instructions? You want that I explain all that i know? Could you help me?

 

[Guilherme]

Alpha, then could you please take me a good article abou pipelines?

Tanx!

 

[3dcgi]

A pipeline in general graphics lingo is not the same as the strict definition of a pipeline in computer architecture. In computer architecture a pipeline is breaking tasks up into stages like an assembly line. At some point marketing folks started using the term to describe the number of pixels rendered per clock. Today the number of pixels rendered per clock (color ROPs) is but a part of the overal picture so the number of pipelines is not a useful metric anymore. In reality graphics chips have lots of computer architecture pipelines with each ending at a FIFO or some other memory structure.

Todays chips are rated by their color ROPs, Z ROPs, Texture units, ALUs, etc.

 

[Guilherme]

A pipeline in general graphics lingo is not the same as the strict definition of a pipeline in computer architecture. In computer architecture a pipeline is breaking tasks up into stages like an assembly line. At some point marketing folks started using the term to describe the number of pixels rendered per clock. Today the number of pixels rendered per clock (color ROPs) is but a part of the overal picture so the number of pipelines is not a useful metric anymore. In reality graphics chips have lots of computer architecture pipelines with each ending at a FIFO or some other memory structure.

Todays chips are rated by their color ROPs, Z ROPs, Texture units, ALUs, etc.

Good explanation, what is a Z ROP? What is Z comparison ? would be related the depth?

 

[Remi]

"Zed is depth baby, Zed is depth..."

 

[Guilherme]

What is the level of importance of a Z comparison Unit? So as ROP and TMUS? This kind of unit calculates exactly what? The level of pixel's depth or vertex depth?]

TAnx Remi

 

[3dcgi]

Z (depth) comparison units are very important as they are the foundation of rasterization (the type of rendering graphics cards use). As each pixel is rendered an associated depth is calculated. When another triangle is rasterized and covers the same pixel its depth will determine if the pixel is visible. Despite their importance Z comparison units are not complicated compared to shader ALUs.

High end PC cards these days perform 16 or 32 z comparisons per clock assuming there is enough memory bandwidth to provide them with data. Xenos is actually a little better here with 4x antialiasing enabled as it does 64 z comparisons per clock.