Do R3XX and NV3X have a "command processor"?

[Luminescent]

It was interesting to read about the command processor in the P10 and how it was able to multithread applications within the processor and allow for general flexibility. The B3D article is found here.

I would like to know if you guys thought R3XX or NV3X contained somthing similar in functionality. Within these architectures, is there one command processing unit, or does each pixel and vertex pipeline contain the control logic? We know there are microinstructions inside each shader pipeline, but are there macroinstructions which are sent to each pipeline first? In cpu's there is also a sort of command processor which is many times superscalar (n-way superscalar). For example, if a vpu has 8 pixel pipelines and 4 vertex pipelines, does it need a 12-way superscalar command processor to issue macroinstructions (if that's what they're called)?

 

[Luminescent]

Having looked over the Radeon 9700 pipeline overview pdf, I cured some of my ignorance. A link to the SDK which contains this very informative document can be found here.

Basically, the advanced 4-way memory controller regulates arbitrations between cpu, agp interface, and gpu components. Each vertex pipeline is independent as is each pixel pipeline. Each pixel pipeline has an independent fragment shader and texturing unit, with address logic intermingled. I'm guessing that each pixel processor consists of these three units bunched together, and only these, unlike the configuration of the NV3X.

The more mysterious unit in the R3XX pixel pipeline (floating point texture adress processor) is discussed in this thread.

If any Ati engineers are reading (hardware/software), feel free to contribute.