Digit-Life Hammer Article

[JonWoodruff]

Here it is:http://www.digit-life.com/articles2/amd-hammer-family/index.html

I found the link on jcnews.com (He's back, woo hoo!)

This article has a LOT of info, and much of it new. Why haven't we seen links to it from the bigger websites?

A few of the gems:
1. DRAM frequency versus core frequency (It varies between 150 and 166 depending on the core speed)
2. Details of AMD's Total Performance Initiative benchmark suite with benchmark results.
3. Comparison between 256kb and 1M Athlon 64 in several benchmarks. (SPEC and TPI)
4. EXTENSIVE latency analysis and memory benchmarks at several different core speeds to show scaling of memory performance.
5. Lots of interesting details about how work gets done faster in the Hammer core versus the XP core.

 

[mboeller]

look at www.realworldtech.com they have an really long discussion about this article.

 

[JonWoodruff]

Thanks m, It's encouraging to see somebody else noticed it.
They seem to like getting lost in the details over there at
Real World Technologies; that and flaming eachother using
cryptic Technical jargon. (That's coming from a senior in
Computer Engineering!)

I was more interested in the phenominal scaling in the SPEC benchmarks and the good scaling in the ordinary ones.

Also the really low latency was nice to see (~60 instead of ~120) in the memory controller.

Also it was interesting to hear that the new micro-code instructions (the steps that instructions are broken up into) are more powerful so that
more complex instructions can be executed in fewer cycles. (I suppose this should all be "common sense" but it was interesting
to me.)

 

[mboeller]

Thanks m, It's encouraging to see somebody else noticed it.
They seem to like getting lost in the details over there at
Real World Technologies; that and flaming eachother using
cryptic Technical jargon. (That's coming from a senior in
Computer Engineering!)

; why should they be different from the people here?

I was more interested in the phenominal scaling in the SPEC benchmarks and the good scaling in the ordinary ones.

Also the really low latency was nice to see (~60 instead of ~120) in the memory controller.

Ye-haa; the scaling is phenomenal, when true.

I would like to see the Operton together with some OCZ-EL DDR memory @ 433MHz and with enhanced latency. deMone talkes about the slow normal memory in an other Thread and says that it would be easy to produce much faster DDR-memory, but at twice the cost. I think the Opteron would be the optimal target for such an memory (and IMHO with the Opteron this enhanced memory would even be cost-effective )

 

[Saem]

Well if you do have that fancy DDR RAM, would that possibly inflict large bites on the time alotted for the host memory controller?

Personally, I think Hammer would rip it up with DRDRAM -- skip the political issues please. The on board memory controller would help kill off the latency effect and if it was aggresively made to be able to have lots of banks open, it could push effective bandwidth to new heights.

 

[JonWoodruff]

Ok, that gets me thinking.
If the Hypertransport protocol forks directly off of the memory controller, could a third party build a large level three cache (out of MySys 1T SRAM?) that monitors memory accesses and caches recent stuff and answers accesses that it can satisfy before the DRAM does? The HT bus would have plenty of bandwidth and still much lower latency than the DRAM, but does HT have the intellegence to support a level three cache?

 

[Tahir2]

COMPLETELY OFF TOPIC and a bit nasty (sorry):

OCZ EL does not do what it says on the box most of the time. If you get a piece that does run at its stated latencies then consider yourself lucky.

It is still damn fast but Corsair offers RAM that is leagues ahead of this shoddy OCZ outfit...and this is not the first time this has happened.