Core MIPS vs PowerPC Core

[Urian]

When the ignorant people talk about PowerPC vs x86 they normally talking in a RISC vs CISC comparision.

But when two experts are talking this old argument isn´t valid.

¿What is better for 3D environments a PowerPC based Architecture or MIPS based?

EDIT: I Know that x86 and MIPS are totally different architectures.

 

[hey69]

isn't the FPU power the most important factor here?

 

[DeadmeatGA]

...

I Know that x86 and MIPS are totally different architectures.

Good God....

 

[Grall]

¿What is better for 3D environments a PowerPC based Architecture or MIPS based?

It would depend on the actual implementation of that architecture, and what extra goodies are added into the mix. MIPS in particular are available in many different shapes or forms that actually are rather low performance, and even high-end MIPS processors used in Silicon Graphics servers and workstations aren't all that fast really.

Just a straight PPC or MIPS processor wouldn't be very ideal from a performance viewpoint. Add in extra instruction sets like Altivec however and things start to look brighter. Right now, the fastest PPC (G5, from IBM) beats the fastest MIPS design rather handily, but that doesn't mean a MIPS processor couldn't be at least as good, at least in theory.

So to finally answer your question: "I don't know."


*G*

 

[London Geezer]

I THOUGHT the old debate was declared OVER for the fact that both architectures now share the same elements. CISC processor now do things that only RISC processor used to do. so really, the "best" one is ultimately the fastest one, whatever it is, not because it's RISC or CISC

 

[Simon F]

I THOUGHT the old debate was declared OVER for the fact that both architectures now share the same elements. CISC processor now do things that only RISC processor used to do. so really, the "best" one is ultimately the fastest one, whatever it is, not because it's RISC or CISC

You didn't factor in cost.

 

[Deepak]

I dont care CISC or RISC blah blah....as it is life is so complicated, and to worry about these silly things ...

 

[London Geezer]

I THOUGHT the old debate was declared OVER for the fact that both architectures now share the same elements. CISC processor now do things that only RISC processor used to do. so really, the "best" one is ultimately the fastest one, whatever it is, not because it's RISC or CISC

You didn't factor in cost.

yeah of course, but the debate has always been about RISC processors being able to process many things at once albeit slowly, while CISC processor being able to run one thing at a time, fast.
nowadays every processor has some kind of parallelism going on for it, therefore the debate has been over for quite a while.
but do correct me if i'm wrong

 

[Bohdy]

Wrong way round, london-boy....

 

[London Geezer]

Wrong way round, london-boy....

I KNEW IT!

no hold on, u sure? i'm pretty sure that the Pentium family (for example) are CISC processors...

 

[Bohdy]

yeah of course, but the debate has always been about RISC processors being able to process many things at once albeit slowly, while CISC processor being able to run one thing at a time, fast.

Replace RISC with CISC and vice versa in that quote and you have it right.

And Pentium etc. is CISC.

 

[randycat99]

To confuse matters further, I was to understand that there are no current genuine CISC processors (since the 90's), anyway? The Athlon is actually some sort of expanded RISC at its core with a CISC conversion front end to make it compatible with the x86 ISA. I think Intel's Pentium (since the Pentium Pro) has something similar going on, but they are much less vocal about it. The G3, G4, G5 series (maybe even going all the way back to the 601) has been RISC.

Having said that, my impression has been that RISC did indeed "win the war", but the distinction has been a bit ambiguous since RISC has changed and evolved over the years (so it is less like the RISC known from the "early days") and the advent of "CISC-based" architectures still in wide use in the x86 realm by virtue of the aforementioned CISC convertor over a RISC core technique.

Now correct me if I'm wrong, but isn't the Itanium project based on what is termed an EPIC architecture?

Now my take on the PPC vs MIPs comparison- my guess is that the design of the PPC offers more advanced features wrt to prediction, branching, and OOO executions (yadda, yadda, yadda) which will make it a more consistent (though not necessarily the fastest) performer when running code of varied qualities. (Naturally, the Pentium series takes this to an even higher level in order to keep those long pipelines busy, but that is beside the point in this PPC vs MIPs discussion.) The MIPs, OTOH, is a more simple design that strongly responds to code that is "handcrafted" for it alone. Given that condition, it can perform quite comparably to more "elaborate" processors. However, it will be more susceptible to stalls and inefficiency when fed general code that hasn't been given the "TLC" treatment.

 

[Saem]

To confuse matters further, I was to understand that there are no current genuine CISC processors (since the 90's), anyway? The Athlon is actually some sort of expanded RISC at its core with a CISC conversion front end to make it compatible with the x86 ISA. I think Intel's Pentium (since the Pentium Pro) has something similar going on, but they are much less vocal about it. The G3, G4, G5 series (maybe even going all the way back to the 601) has been RISC.

Intel talks about uOps in it's documents extensively. Addtionally, the G4s all the way back to the 601s aren't actually that RISCy. And the G5 is a bit more hybrid, such as x86 since it does a bit of decodring/"cracking", nothing as extensive as x86, however.

Now correct me if I'm wrong, but isn't the Itanium project based on what is termed an EPIC architecture?

It's Explicitly Parallel Instruction Computer? I can't remember the acronym proplery, but I believe that's on the right track. It's VLIW, wee.

Now my take on the PPC vs MIPs comparison- my guess is that the design of the PPC offers more advanced features wrt to prediction, branching, and OOO executions (yadda, yadda, yadda) which will make it a more consistent (though not necessarily the fastest) performer when running code of varied qualities. (Naturally, the Pentium series takes this to an even higher level in order to keep those long pipelines busy, but that is beside the point in this PPC vs MIPs discussion.) The MIPs, OTOH, is a more simple design that strongly responds to code that is "handcrafted" for it alone. Given that condition, it can perform quite comparably to more "elaborate" processors. However, it will be more susceptible to stalls and inefficiency when fed general code that hasn't been given the "TLC" treatment.

Um... do branch prediction, pipeline length, OoOE come into ISA?

I think the debate is about design and not implementation, I believe MIPS is the winner in this department due to it's greater simplicity -- I could be mistaken, this is hearsay.

 

[randycat99]

Um... do branch prediction, pipeline length, OoOE come into ISA?

Beats the hell outta me. I was just describing what I felt were the relevant parts of a typical PPC in use (a PPC 750, for example, as is used in the GC). I imagine such features could be radically different even within a processor family containing many generations. I guess what I was getting at was that the PPC in a GC would hold some fancy features (as a processor) over the MIPs in a PS2.