Comparing embedded GPUs in Mobiles to Laptops

Ah there comes my idea that those can't really run d3d9 fast (well if it requires fp32 at least). Going from 2 pipes * 4 flops (sgx530/535) to 4 pipes * 9 flops (sgx543) is quite a big jump in the arithmetic department indeed. Especially the 535 seemed to be a bit lacking as far as flops were concerned (considering its texel / color fill rate).

 

The 535 had to straddle the line between UMPC and cellphone considering Intel's ambitions, and Apple's OpenGL ES 2.0 performance from the 535, while not exploiting the DirectX 9 potential, and results with mobile UE3 showed what targeted software could do.

 

As I said it'll truly get interesting with next generation Rogue; even more so if any DX11 compliant designs appear in devices.

Only the SGX545 (Intel GMA700) is DX10.1/OGL3.1 from the entire Series5/5XT family of cores. SGX544/554 are DX9.0 Level 3.0 (DX11 certified DX9.0).

Intel is currently rolling out in products GMA600 (SGX535@ up to 400MHz); only their next batch (GMA700) will contain the SGX545.

 

SGX520-545 = USSE
SGX543/544/554 = USSE2

When they announced the Series5XT/USSE2 they mentioned that it has dual issue ALUs.

As for the USSE cores John has mentioned under which conditionals 2xFP32 are possible (instead of 1) but my memory is weak on that one. I wouldn't think though (but would like to stand corrected) that the same conditionals apply for USSE2. Those 9 FLOPs in the latter could be described as "4+1" and if I'm not mistaken the Vec4+1 PS ALU of ULP GF in Tegra2 (despite being limited to 80bit RGBA) is capable of a 9th FLOP too, for which I suspect they mean the programmable blending unit within the ALU, which can give the 9th FLOP if no blending is being used.

I'm in the dark where the 9th FLOP comes from in USSE2, but I also recall that all (?) SGX cores are also are capable of programmable blending in their ALUs. I don't think it's the 9th FLOP in USSE2 but could be wrong.

For Series6/Rogue the most tickling question in terms of FLOPs isn't IMHO the >210GFLOPs value, as I'd be very surprised if it represents anything lower than FP32; I'd rather love to know how the SP/DP ratio looks like on that one. If it should have Vec5 ALUs it could be 5:1 or else ~43 GFLOPs FP64.

 

If I had to guess (and I genuinely have no insider information on this point, at least certainly not that I remember), I'd say the DX10 variant doesn't support FP64 at all, while the DX11 variant supports it at something roughly around what you said. And I'd guess the A9600 uses the DX10 variant.

 

As stated before, the 200MHz SGX543MP4 in PSVita should be in the same ballpark as a 280MHz Cedar (a bit above, maybe), or a ~550MHz RV610 (or Radeon HD3200, as you called it).

Of course, given their nature, these chips will never be directly compared..
The SGX545 in future Atom tablet solutions may eventually be benchmarked against a HD3200 (and probably fail miserably), but it'll depend a lot on driver development for PowerVR solutions for windows, which has been nothing short of awful until recently...

I think the next time we'll see a real competition between PowerVR GPUs and AMD GPUs should be if\when Intel brings Series 6 into future Atoms, in order to compete with AMD's E and C-series APUs.

 

The windows driver in GMA500 was developed by the late Tungsten graphics and not by IMG.

 

A9600 is a smart-phone SoC; I can't imagine what they'd need DX11 for. I'd even argue that DX10 could be overkill, but with such designs I suppose it's more complicated to scale down further in capabilities than to keep them in.

 

You're both a little wide of the mark when it comes to guessing what marks out a Rogue variant as "DX10.1" or "DX11", and you need to consider what software A9600 is likely to want to execute during its lifetime too.

 

Hmm strange naming. Basically 540/545 belong to "old" generation, 543/544 to new one (and are faster). You'd think the 545 could benefit from more flops especially given its target market...

 

The 545 showed up on roadmaps long before its official announcement, so it dates back quite a ways.

The last digit in the naming scheme for the PowerVR cores denotes extra features it sports over the other cores of its line: a big change in API support was a +5, the Series5 XT refresh was a +3, and a smaller change like a wider bus was a +1.

Moving from the 540 and the 543, which I believe both to have lesser API support than the 535, to the full DirectX 9 544 obviously has a smaller relative jump in its parts number since the DirectX 10.1 545 was already in place.

Obviously, the first digit in the naming scheme for a core is its Series number, and the second is the scale of its number of pipelines.

 

Early Series5 road-maps had also a lower end SGX510 and a 8 ALU/4 TMU (?) SGX555. No idea though about the latter's capabilities. In any case the 545 strikes me more like some sort of special order from Intel, where I suppose at the time of that agreement Series5XT wasn't even born. Series5XT follows a weird scheme of additions and reductions at the same time compared to the original non multi-core SGXs. It's not only that they've increased ALU throughput in XTs, but also other aspects like z/stencil units.

SGX520-540 are 8 z/stencil from what I recall, and 545/543/544/554 are all 16 z/stencil.