marconelly!
Veteran
OK, first published information about the bandwidth specs can be found in here and it says:
This seem to be in agreement with anothe press release from Rambus, talking about 100GB/s to I/O.
Then, on another slide, it was publicized that Cell would have 25.6 GB/s (per chip?) and ~75GB/s to I/O, if I remember correctly
So, why are these numbers so conflicting?
Also, and this is unrelated, can we be sure about the total amount of memory in PS3 (256MB), based on the size of individual chips they plan to use?
As previously announced, the off chip I/O interface is Rambus Redwood and the memory interface is XDR. Similar clocking/deskewing schemes. Looks to be about ~50 GB/s BW to memory, and 50~100 GB/s to I/O.
This seem to be in agreement with anothe press release from Rambus, talking about 100GB/s to I/O.
Then, on another slide, it was publicized that Cell would have 25.6 GB/s (per chip?) and ~75GB/s to I/O, if I remember correctly
So, why are these numbers so conflicting?
Also, and this is unrelated, can we be sure about the total amount of memory in PS3 (256MB), based on the size of individual chips they plan to use?